DMA Accelerator Functional Unit User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

Download PDF
ID 683263
Date 3/06/2020
Public
Document Table of Contents
Document Table of Contents x
1. About this Document 2. DMA AFU Description 3. Register Map and Address Spaces 4. Software Programming Model 5. Running DMA AFU Example 6. Compiling the Accelerator Function (AF) 7. Simulating the AFU Example 8. DMA Accelerator Functional Unit User Guide Archives 9. Document Revision History for the DMA Accelerator Functional Unit User Guide A. Enabling Hugepages
1. About this Document x
1.1. Intended Audience 1.2. Conventions 1.3. Acronyms 1.4. Acceleration Glossary
2. DMA AFU Description x
2.1. Introduction 2.2. The DMA AFU Software Package 2.3. The DMA AFU Hardware Components
2.3. The DMA AFU Hardware Components x
2.3.1. DMA Test System 2.3.2. DMA BBB
3. Register Map and Address Spaces x
3.1. DMA AFU Register Map
3.1. DMA AFU Register Map x
3.1.1. DMA AFU Address Space
4. Software Programming Model x
4.1. Software APIs
4.1. Software APIs x
4.1.1. fpgaDmaOpen() 4.1.2. fpgaDmaTransferSync() 4.1.3. fpgaDmaClose()
5. Running DMA AFU Example x
5.1. Optimization for Improved DMA Performance
1. About this Document
2. DMA AFU Description
3. Register Map and Address Spaces
4. Software Programming Model
5. Running DMA AFU Example
6. Compiling the Accelerator Function (AF)
7. Simulating the AFU Example
8. DMA Accelerator Functional Unit User Guide Archives
9. Document Revision History for the DMA Accelerator Functional Unit User Guide
A. Enabling Hugepages

5. Running DMA AFU Example

Before you begin:
  • Intel recommends you refer to the Quick Start Guide for your Intel® PAC with Intel® Arria® 10 GX FPGA to be familiar with running similar examples. Before you proceed through the following steps, verify that the OPAE_PLATFORM_ROOT environment variable is set to the OPAE SDK installation directory.
  • The sample application requires two 1 GB hugepages. Refer to the Enabling Hugepages section for details on how to set the hugepages on both Red Hat Enterprise Linux (RHEL) and Ubuntu systems.

Complete the following steps to download the DMA AF bitstream and build and run the example software:

  1. Change to the DMA application and driver directory: 
    cd $OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw
  2. Build the driver and application: 
    $ make
  3. Download the DMA AFU bitstream: 
    sudo fpgasupdate $OPAE_PLATFORM_ROOT/hw/samples/dma_afu \
/bin/dma_afu_unsigned.gbs
  4. Execute the host application: 
    ./fpga_dma_test 0
    The DMA software takes a few minute to populate test buffers and verify the results. The software prints the following messages during a successful run: 
    Running test in HW mode
Buffer Verification Success!
Buffer Verification Success!
Running DDR sweep test
Buffer pointer = 0x7f6edd1fc000, size = 0x100000000 (0x7f6edd1fc000 through 0x7f6fdd1fc000)
Allocated test buffer
Fill test buffer
DDR Sweep Host to FPGA
Measured bandwidth = 6660.504131 Megabytes/sec 
Clear buffer
DDR Sweep FPGA to Host
Measured bandwidth = 6840.013692 Megabytes/sec 
Verifying buffer..
Buffer Verification Success!
    Note: The test application prints bandwidth results for different transfer sizes, source and destination addresses.
Related Information
Level Two Title