25G Ethernet Intel® Stratix® 10 FPGA IP Design Example User Guide

ID 683252
Date 6/18/2020
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

1.4.1. Procedure

To compile and configure a design example on hardware, follow these steps:
  1. Launch the Intel® Quartus® Prime Pro Edition software and select Processing > Start Compilation to compile the design.
  2. After you generate an SRAM object file .sof, follow these steps to program the hardware design example on the Intel® Stratix® 10 device:
    1. On the Tools menu, click Programmer.
    2. In the Programmer, click Hardware Setup.
    3. Select a programming device.
    4. Select and add the Intel® Stratix® 10 GX board to your Intel® Quartus® Prime Pro Edition session.
    5. Ensure that Mode is set to JTAG.
    6. Select the Intel® Stratix® 10 device and click Add Device. The Programmer displays a block diagram of the connections between the devices on your board.
    7. In the row with your .sof, check the box for the .sof.
    8. Check the box in the Program/Configure column.
    9. Click Start.
    Note: This design targets the Intel® Stratix® 10 device. Please contact your Intel® FPGA representative to inquire about a platform suitable to run this hardware example.