Intel® Quartus® Prime Pro Edition User Guide: Block-Based Design
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1.6.2.1. Empty Partition Clock Source Preservation
The Intel® Quartus® Prime software recognizes and preserves the following as clock sources for a partition:
- Signals from a PLL.
- Feeds from internal clock inputs on flip-flops, memories, HSSIO, I/O registers, or PLLs outside the partition that you empty.
The Intel® Quartus® Prime software does not recognize the following as clock sources for a partition:
- Nets with sources external to the FPGA that do not feed a clock input inside the FPGA.
- Nets that connect only to combinatorial logic.
- Nets that connect only to an output pin.
- Nets that feed only logic within an empty partition.