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Ixiasoft
Visible to Intel only — GUID: dgi1522777307125
Ixiasoft
1.2.1. Design Block Reuse Overview
- Synthesized snapshot
- Final snapshot
Core partition reuse enables preservation and export of compilation results for a core partition. Reuse of the core partition allows an IP developer to create and optimize an IP once and share it across multiple projects.
Root partition reuse enables preservation and export of compilation results for a top-level (or root) partition that describes the device periphery, along with associated core logic. Reuse of the periphery allows a board developer to create and optimize a platform design with device periphery logic once, and then share that root partition with other board users who create custom core logic. The periphery resources include all the hardened IP in the device periphery, such as general purpose I/O, PLLs, high-speed transceivers, PCIe, and external memory interfaces.
Team members can work on different partitions separately, and then bring them together later, facilitating a team-based design environment. A team lead integrates the partitions in the system and provides guidance to ensure that each partition uses the appropriate device resource and achieves design requirements during the full design integration. A Developer initially creates and exports a block as a partition in one Intel® Quartus® Prime project. Subsequently, a Consumer reuses the partition in a different project.1 To avoid resource conflicts, floorplanning is essential when reusing final snapshot partitions.