Low Latency 40G for ASIC Proto Ethernet Intel® FPGA IP User Guide

ID 683221
Date 11/10/2022
Public
Document Table of Contents

4.1.1.2. Preamble Insertion

In the TX datapath the MAC prepends an eight-byte preamble to the client frame. If you turn on Enable link fault generation , this MAC module also incorporates the functions of the reconciliation sublayer (RS).

The source of the 7-byte preamble (including a Start byte) and 1-byte SFD depends on whether you turn on Enable preamble passthrough in the parameter editor.

Note that a single parameter in the Low Latency 40G for ASIC Proto Ethernet parameter editor turns on both RX and TX preamble passthrough.