Visible to Intel only — GUID: vgo1434709929967
Ixiasoft
1.1. HDMI Intel® FPGA IP v19.7.4
1.2. HDMI Intel® FPGA IP v19.7.3
1.3. HDMI Intel® FPGA IP v19.7.2
1.4. HDMI Intel® FPGA IP v19.7.0
1.5. HDMI Intel® FPGA IP v19.6.1
1.6. HDMI Intel® FPGA IP v19.6.0
1.7. HDMI Intel® FPGA IP v19.5.0
1.8. HDMI Intel® FPGA IP v19.4.0
1.9. HDMI Intel® FPGA IP v19.3.0
1.10. HDMI Intel® FPGA IP v19.1
1.11. HDMI Intel® FPGA IP v18.1 Update 1
1.12. HDMI Intel® FPGA IP v18.1
1.13. HDMI Intel® FPGA IP v18.0
1.14. Intel FPGA HDMI IP Core v17.1
1.15. HDMI IP Core v17.0
1.16. HDMI IP Core v16.1
1.17. HDMI IP Core v16.0
1.18. HDMI IP Core v15.1
1.19. HDMI IP Core v15.0 Update 1
1.20. HDMI IP Core v15.0
1.21. HDMI IP Core v14.1
1.22. HDMI Intel® FPGA IP User Guide Archives
1.23. HDMI Arria® 10 FPGA IP Design Example User Guide Archives
1.24. HDMI Cyclone® 10 GX FPGA IP Design Example User Guide Archives
1.25. HDMI Stratix® 10 FPGA IP Design Example User Guide Archives
Visible to Intel only — GUID: vgo1434709929967
Ixiasoft
1.19. HDMI IP Core v15.0 Update 1
Description | Impact |
---|---|
Fixed the timing violation on the oversampling block in the Arria V HDMI 2.0 design. | Upgrade if you are using the Arria V HDMI 2.0 design. |