Visible to Intel only — GUID: iga1431722470159
Ixiasoft
Visible to Intel only — GUID: iga1431722470159
Ixiasoft
13.2. Functional Description
Intel FPGA Avalon® Mailbox provides two 32-bit registers for message passing between processors, Command register (0x0) and Pointer register (0x1). The message sender processor and message receiver processor have individual Avalon® Memory Mapped ( Avalon® -MM) interfaces to a Mailbox component. A write to the command register by the sender processor indicates a pending message in the Mailbox and an interrupt will be issued to the receiver processor. Upon retrieval of the message by the receiver processor via a read transaction, the message is consumed, Mailbox is empty. The status register (0x2) is used to indicate if the Mailbox is full or empty.
The Mailbox Avalon® -MM interface which receives messages, or identified as sender interface, will back pressure the sender if there is message pending in the Mailbox. This will ensure every single message passed into the Mailbox is not overwritten. Upon message arrival, the receiving processor will then receive a level interrupt by the Mailbox. The interrupt will hold high until the single message is retrieved from the Mailbox via the Avalon® -MM interface of receiving processor.
In addition, the Interrupt Masking Register (0x3) is writable by the Avalon® -MM interface to mask its dedicated interrupt output. For example, receiver interface will be able to set the mask bit to mask off the message pending interrupt generated by Mailbox. Meanwhile, sender interface will be able to set the mask bit to mask off the message space interrupt output.
The Mailbox is clocked with single source. Both of the Avalon® -MM Agent interfaces have its individual function to set and clear the Full bit and Message Pending bit. The Avalon® -MM Agent of the sender processor will only set the status bits, while the Avalon® -MM Agent of the receiver processor only clears the status bit.
An interrupt is derived from the Status register bits. It will remain high until the message in the Mailbox is read.