Visible to Intel only — GUID: edr1522431898997
Ixiasoft
Visible to Intel only — GUID: edr1522431898997
Ixiasoft
7.1.3.1. Peripheral Channel
The peripheral channel allows you to communicate between the eSPI host and the eSPI endpoints located at the agent side (example: PORT80). To reset the channel, use the platform reset (PLTRST_n VW).
You can enable the peripheral IO access and configure the port width and direction using the Platform Designer. The eSPI agent core allocates address range from 00h to A0h to access the peripheral IO. See Table: Peripheral IO Port Configuration for more details. By default, the pc_port80 has 8-bit data width. Each address location can be configured as 8-bit wide, 16-bit wide or 32-bit wide.
When you set an IO port to 8-bit wide, you must access the port using PUT_IORD_SHORT 1 byte/PUT_IOWR_SHORT 1 byte command. When you set an IO port to 16-bit wide, you must access the port using PUT_IORD_SHORT 2 byte/PUT_IOWR_SHORT 2 byte command. When you set an IO port to 32-bit wide, you must access the port using PUT_IORD_SHORT 4 byte/PUT_IOWR_SHORT 4 byte command.
Address | Data Width | Port Name | Port Direction | Enable |
---|---|---|---|---|
00h | 8/16/32 | pc_port00 | Input/Output | Yes/No |
10h | 8/16/32 | pc_port10 | Input/Output | Yes/No |
20h | 8/16/32 | pc_port20 | Input/Output | Yes/No |
30h | 8/16/32 | pc_port30 | Input/Output | Yes/No |
40h | 8/16/32 | pc_port40 | Input/Output | Yes/No |
50h | 8/16/32 | pc_port50 | Input/Output | Yes/No |
60h | 8/16/32 | pc_port60 | Input/Output | Yes/No |
70h | 8/16/32 | pc_port70 | Input/Output | Yes/No |
80h | 8/16/32 | pc_port80 | Input/Output | Yes/No |
90h | 8/16/32 | pc_port90 | Input/Output | Yes/No |
A0h | 8/16/32 | pc_portA0 | Input/Output | Yes/No |