Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP Cores Release Notes

ID 683110
Date 7/19/2024
Public
Document Table of Contents

1.7.5. ROM: 2-PORT Intel® FPGA IP v20.1.0

Table 24.  v20.1.0 2020.10.12
Quartus® Prime Version Description Impact
20.3 Added "X" propagation support in simulation model for the Stratix® 10 devices.
Table 25.  v20.1.0 2020.08.03
Quartus® Prime Version Description Impact
20.1 Disabled the LP option in the Agilex™ 7 devices. You are required to perform IP upgrade if you are setting the LP mode in the Agilex™ 7 devices.