Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP Cores Release Notes

ID 683110
Date 7/19/2024
Public
Document Table of Contents

1.3.1. RAM: 2-PORT Intel® FPGA IP v20.4.0

Table 4.  v20.4.0 2023.06.26
Quartus® Prime Version Description Impact
23.2 Error message is prompted when the following parameters are set in the parameter editor:
  • RAM_BLOCK_TYPE is set to MLAB.
  • Read-during-write mode is set to OLD_DATA.
  • Asynchronous clear feature for read address is enabled.
IP upgrade is optional in Quartus® Prime Pro Edition software version 23.2.
  • IP regeneration is only required if customers have the similar design mentioned.
  • There are no changes to other existing features.