External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP Design Example User Guide

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ID 683096
Date 3/29/2021
Public
Document Table of Contents
Document Table of Contents x
1. Design Example Quick Start Guide for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP 2. Design Example Description for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP 3. Document Revision History for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP Design Example User Guide
1. Design Example Quick Start Guide for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP x
1.1. Creating an EMIF Project 1.2. Generating and Configuring the EMIF IP 1.3. Generating the Synthesizable EMIF Design Example 1.4. Generating the EMIF Design Example for Simulation 1.5. Simulation Versus Hardware Implementation 1.6. Simulating External Memory Interface IP With ModelSim 1.7. Pin Placement for Intel® Cyclone® 10 GX EMIF IP 1.8. Compiling and Programming the Intel® Cyclone® 10 GX EMIF Design Example 1.9. Debugging the Intel® Cyclone® 10 GX EMIF Design Example
1.2. Generating and Configuring the EMIF IP x
1.2.1. Intel® Cyclone® 10 GX EMIF Parameter Editor Guidelines
2. Design Example Description for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP x
2.1. Synthesis Example Design 2.2. Simulation Example Design 2.3. Example Designs Interface Tab
1. Design Example Quick Start Guide for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP
2. Design Example Description for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP
3. Document Revision History for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP Design Example User Guide

1.6. Simulating External Memory Interface IP With ModelSim

This procedure shows how to simulate the EMIF design example.

  1. Launch the Mentor Graphics* ModelSim software and select File > Change Directory. Navigate to the sim/ed_sim/mentor directory within the generated design example folder.
  2. Verify that the Transcript window is displayed at the bottom of the screen. If the Transcript window is not visible, display it by clicking View > Transcript.
  3. In the Transcript window, run source msim_setup.tcl.
  4. After source msim_setup.tcl finishes running, run ld_debug in the Transcript window.
  5. After ld_debug finishes running, verify that the Objects window is displayed. If the Objects window is not visible, display it by clicking View > Objects.
  6. In the Objects window, select the signals that you want to simulate by right-clicking and selecting Add Wave.
  7. After you finish selecting the signals for simulation, execute run -all in the Transcript window. The simulation runs until it is completed.
  8. If the simulation is not visible, click View > Wave.
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