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1. Design Example Quick Start Guide for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP
2. Design Example Description for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP
3. Document Revision History for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP Design Example User Guide
1.1. Creating an EMIF Project
1.2. Generating and Configuring the EMIF IP
1.3. Generating the Synthesizable EMIF Design Example
1.4. Generating the EMIF Design Example for Simulation
1.5. Simulation Versus Hardware Implementation
1.6. Simulating External Memory Interface IP With ModelSim
1.7. Pin Placement for Intel® Cyclone® 10 GX EMIF IP
1.8. Compiling and Programming the Intel® Cyclone® 10 GX EMIF Design Example
1.9. Debugging the Intel® Cyclone® 10 GX EMIF Design Example
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1.8. Compiling and Programming the Intel® Cyclone® 10 GX EMIF Design Example
After you have made the necessary pin assignments in the .qsf file, you can compile the design example in the Intel® Quartus® Prime software.
- Navigate to the Intel® Quartus® Prime folder containing the design example directory.
- Open the Intel® Quartus® Prime project file, (.qpf).
- To begin compilation, click Processing > Start Compilation. The successful completion of compilation generates an .sof file, which enables the design to run on hardware.
- To program your device with the compiled design, open the programmer by clicking Tools > Programmer.
- In the programmer, click Auto Detect to detect supported devices.
- Select the Intel® Cyclone® 10 GX device and then select Change File.
- Navigate to the generated ed_synth.sof file and select Open.
- Click Start to begin programming the Intel® Cyclone® 10 GX device. When the device is successfully programmed, the progress bar at the top-right of the window should indicate 100% (Successful).