AN 778: Intel® Stratix® 10 L-Tile/H-Tile Transceiver Usage

ID 683086
Date 6/24/2022
Public
Document Table of Contents

2.1.1.2. Possible Combinations of GX and GXT Channels in L-Tile

GXT channels are only supported in banks GXB1D/H/L and GXB4D/H/L and GXB1F/J/N and GXB4F/J/N.

Table 8.  Combination 1: 4 GXT and 0 GX Channels
Channel Type Number of Channels per Bank Channel Capability for L-Tile
Chip-to-Chip & Chip-to-Module Backplane
GX 0 N/A N/A
GXT 4 4 26.6 Gbps N/A
Figure 15. Example Combination 1: 4 GXT and 0 GX Channels
Table 9.  Combination 2: 3 GXT and 1 GX Channels
Channel Type Number of Channels per Bank Channel Capability for L-Tile
Chip-to-Chip & Chip-to-Module Backplane
GX 1 12.5 Gbps 12.5 Gbps
GXT 4 3 26.6 Gbps N/A
Figure 16. Example Combination 2: 3 GXT and 1 GX Channels
Table 10.  Combination 3: 2 GXT and 2 GX Channels
Channel Type Number of Channels per Bank Channel Capability for L-Tile
Chip-to-Chip & Chip-to-Module Backplane
GX 2 12.5 Gbps 12.5 Gbps
GXT 4 2 26.6 Gbps N/A
Figure 17. Example Combination 3: 2 GXT and 2 GX Channels
Table 11.  Combination 4: 1 GXT and 3 GX Channels
Channel Type Number of Channels per Bank Channel Capability for L-Tile
Chip-to-Chip & Chip-to-Module Backplane
GX 3 12.5 Gbps 12.5 Gbps
GXT 4 1 26.6 Gbps N/A
Figure 18. Example Combination 4: 1 GXT and 3 GX Channels
4 If you use GXT channel data rates, the VCCR_GXB and VCCT_GXB voltages must be set to 1.12 V.