Visible to Intel only — GUID: wgm1598409271943
Ixiasoft
Visible to Intel only — GUID: wgm1598409271943
Ixiasoft
2.5.4. Cross-Probing from Design Assistant
In addition to the Locate Node command, Design Assistant allows you to cross-probe individual design objects relevant to the violation. For select high-value rules, Design Assistant provides full violation cross-probing ability into the Intel® Quartus® Prime Timing Analyzer and other design visualization tools.
For example, for rule TMC-20210 - Paths Failing Setup Analysis with High Routing Delay Added for Hold, you can right-click the violation, and then click Report Timing (Extra Info) to locate the path in the Timing Analyzer GUI.
You can also locate from a rule violation instance to the source of the violation in Intel® Quartus® Prime design visualization tools, such as RTL Viewer, Resource Property Viewer, Technology Map Viewer, and Chip Planner. You can also locate to the violation source in the design file.
Cross-probing with Design Assistant can help you to more rapidly identify the root cause and resolve any rule violations negatively impacting your design.