AN 833: Intel® Stratix 10® GX 16-Lane RX JESD204B-ADC12DJ3200 Interoperability Reference Design

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ID 683049
Date 12/19/2017
Public
Document Table of Contents
Document Table of Contents x
Intel® Stratix® 10 GX 16-Lane RX JESD204B-ADC12DJ3200 Interoperability Reference Design
Intel® Stratix® 10 GX 16-Lane RX JESD204B-ADC12DJ3200 Interoperability Reference Design x
Reference Design Block Diagram Key Features Submodules in the Top-Level HDL Files Requirements Reference Design Walkthrough Procedures in the main.tcl System Console Script Document Revision History for AN 833: Intel® Stratix® 10 GX 16-Lane RX JESD204B-ADC12DJ3200 Interoperability Reference Design
Requirements x
Hardware Requirements Software Requirements
Reference Design Walkthrough x
Hardware Set Up Running the Reference Design Viewing the Results Rebuilding Design
Running the Reference Design x
Compiling the Project to Include Signal Tap II File Setting Up the TI ADC12DJxx00 GUI Software and Board Configuring the FPGA Checking the Basic Operation Executing the .tcl Code and Initializing the JESD204B Links Checking the Deterministic Latency
Viewing the Results x
Link Up Test Results Short Transport Layer and Ramp Test Mode Test Results Deterministic Latency Test Results
Short Transport Layer and Ramp Test Mode Test Results x
Verifying Short Transport Test Patterns at Receiver Transport Layer Verifying Ramp Pattern at Output Data of DLL to the Input Receiver Transport Layer
Intel® Stratix® 10 GX 16-Lane RX JESD204B-ADC12DJ3200 Interoperability Reference Design

Setting Up the TI ADC12DJxx00 GUI Software and Board

To set up the TI ADC12DJxx00 GUI software and board, follow these steps:
  1. Install the ADC12DJ3200 GUI Configuration software.
  2. Extract the files from the .zip file.
  3. Run the executable file (setup.exe) and follow the instructions. Use the default installation location (C:\Program Files (x86)\Texas Instruments\ADC12DJxx00 GUI\).
  4. Connect the USB cable to PC and turn on the power supply for the ADC12DJ3200 EVM. Launch the ADC12DJ3200 GUI.exe available from your installation directory.

    The USB status becomes green if the ADC12DJ3200 EVM card is detected.

    Figure 3. ADC12DJxx00 GUI EVM Tab
  5. Replace the original files with the following modified version of the .cfg files using the same file names.
    • ADC12DJxx00_JMODE1.cfg
    • LMK04828_JMODE1.cfg
    The original files are in this directory: C:\Program Files (x86)\Texas Instruments\ADC12DJxx00 GUI\Configuration File. Extract the ConfigurationFile.zip file to get the modified version of the .cfg files. You can find the ConfigurationFile.zip file after installing the <project>.par file. Back up the two original files before replacing the two .cfg files provided in the reference design into the same directory.
  6. Select Clock Source > On-board. This is the default setting.
  7. Select On-board Fclk Selection > Fclk = 3200 MHz.
  8. Select Decimation and Serial Data Mode > JMODE1.
  9. Click Program Clocks and ADC.

    Clicking the Program Clocks and ADC overwrites any previous device register settings.

  10. Verify the settings for ADC12DJxx00 LMK04828 > Clock Outputs tab as in the following figure.
    Figure 4. ADC12DJxx00 GUI LMK04828 Tab
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