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Ixiasoft
3.4.2. Avalon® Streaming Interface Signals
Name | Direction | Width | Description |
---|---|---|---|
data_sink_sop | In | 1 | Assert this signal to indicate the beginning of the packet. |
data_sink_eop | In | 1 | Assert this signal to indicate the end of the packet. |
data_sink_valid | In | 1 | Assert this signal to indicate that the data_sink_data[] signal and other signals on this interface are valid. |
data_sink_ready | Out | 1 | When asserted, this signal indicates that the packet classifier is ready to accept data. |
data_sink_data[] | In | n 1 | The input packet. |
data_sink_empty[] | In | 2, 3 | Use this signal to specify the number of empty bytes in the cycle that contain the end of packet. The width of this signal is 2 when the SYMBOLSPERBEAT parameter is 4; 3 when the parameter is 8. This signal does not exist when the SYMBOLSPERBEAT is 1. |
data_sink_error | In | 1 | Assert this signal to indicate that the current input packet contains errors. |
data_src_sop | Out | 1 | When asserted, this signal indicates the beginning of the packet. |
data_src_eop | Out | 1 | When asserted, this signal indicates the end of the packet. |
data_src_valid | Out | 1 | When asserted, this signal indicates that the data_src_data[] signal and other signals on this interface are valid. |
data_src_ready | In | 1 | Assert this signal when the receiving component is ready to accept data. |
data_src_data[] | Out | n 1 | The output data. |
data_src_empty[] | Out | 2, 3 | Contains the number of empty bytes in the cycle that contain the end of packet. The width of this signal is 2 when the SYMBOLSPERBEAT parameter is 4; 3 when the parameter is 8. This signal does not exist when the SYMBOLSPERBEAT is 1. |
data_src_error | Out | 1 | When asserted, this signal indicates that the current output packet contains errors. |
1 n=SYMBOLSPERBEAT*BITSPERSYMBOL