1.6. Configuration Registers
Word Offset | Name | Description | Access | HW Reset Value |
---|---|---|---|---|
0x00 | SecondsH | The upper 16-bit second field of the 96-bit TOD. The value occupies bits 0 to 15. Bits 16 to 31 are not used. Read the TOD registers in this sequence: NanoSec, SecondsL, and SecondsH. 96-bit TOD is snapshot whenever the NanoSec register is read. Write the TOD registers in this sequence: SecondsH, SecondsL, and NanoSec. Reading the SecondsH, SecondsL, and NanoSec registers does not necessarily return the last values written to these registers. |
RW | 0x0 |
0x01 | SecondsL | The lower 32-bit second field of the 96-bit TOD. To read from or write to the TOD registers, refer to the guidelines provided in the SecondsH register description. |
RW | 0x0 |
0x02 | NanoSec | The 32-bit nanosecond field of the 96-bit TOD. Loading this register with a value equal to or larger than a billion leads to an incorrect timestamp. To read from or write to TOD registers, refer to the guidelines provided in the SecondsH register description. |
RW | 0x0 |
0x03 | Reserved | – | – | – |
0x04 | Period | The period for the frequency adjustment.
The reset value of this register, n, is determined by the value of the DEFAULT_NSEC_PERIOD and DEFAULT_FNSEC_PERIOD parameters. |
RW | n |
0x05 | AdjustPeriod | The period for the offset adjustment.
The reset value of this register, n, is determined by the value of the DEFAULT_NSEC_ADJPERIOD and DEFAULT_FNSEC_ADJPERIOD parameters. For offset adjustment, write to AdjustPeriod register followed by AdjustCount register. The TOD offset adjustment starts after the AdjustCount register is written. |
RW | n |
0x06 | AdjustCount |
For offset adjustment, write to AdjustPeriod register followed by AdjustCount register. The TOD offset adjustment starts after the AdjustCount register is written. |
RW | 0x0 |
0x07 | DriftAdjust | The value that the TOD clock uses to periodically adjust the time of day.
|
RW | 0x0 |
0x08 | DriftAdjustRate |
Writing a value other than 0 to this register triggers the drift adjustment. |
RW | 0x0 |
0x09 | OffsetNS |
Writing a value other than 0 to this register triggers the offset in the time of day. |
RW | 0x0 |
0x0A | OffsetFNS |
|
RW | 0x0 |
0x0B | routing_adj_val |
|
RW | 0x0 |
0x0C | JitterTimer |
Periodic jitter adjustment is disabled when this register is set to 0. Writing a value other than 0 to this register enables period jitter adjustment. Hence, write to this register last. |
RW | 0x0 |
0x0D | JitterAdjust |
|
RW | 0x0 |
0x10 | WanderTimerLSB |
Writing a value other than 0 to this register enables wander timer adjustment. Hence, write to the WanderTimerLSB and WanderTimerMSB registers last. |
RW | 0x0 |
0x11 | WanderTimerMSB |
|
RW | 0x0 |
0x12 | WanderAdjust |
|
RW | 0x0 |