2.4.1. Sampling Clock Frequency
To achieve the recommended frequency for the sampling clock, follow these steps:
- The SYNC_MODE and SAMPLE_SIZE parameters determine the sampling clock factor, which is then used to determine the required PLL settings. Use the Sampling Clock Factor to identify the sampling clock factor for your configuration.
- Use the sampling clock factor identified in the previous step to determine the M, N, and C counter settings of PLL. Scale factor for Stratix® V PLL, Stratix® 10 I/O PLL and Agilex™ 7 I/O PLL is M/(N x C). For examples, refer to PLL Settings for Stratix V Devices for M, N, and C counter settings for Stratix® V PLL Intel® FPGA IP.
- In the case where the sampling clock factor is not achievable using the current PLL, Intel recommends that you use an alternative sampling clock frequency of 80 MHz.
- Sampling clock granularity determines the accuracy of synchronization where smaller granularity gives better accuracy. Sampling Clock Granularity for Sampling Clock Factor and Sampling Clock Granularity Using 80 MHz Sampling Clock show the granularity for each recommended sampling clock.
SYNC_MODE | Reference Clock Frequency (MHz) |
Sampling Clock Factor | ||
---|---|---|---|---|
SAMPLE_SIZE = 64 | SAMPLE_SIZE = 128 | SAMPLE_SIZE = 256 | ||
0, 1 | 125 | 16/63 | 32/33 | 64/63 |
156.25 | 64/315 | 128/155 | 256/375 | |
2 | Master/target frequency | 64/63 | 128/153 | 256/375 |
3, 4 | 156.25 | 64/63 | 128/153 | 256/375 |
312.5 | 32/33 | 64/63 | 128/153 | |
5, 6 | 125 | 32/63 | 64/63 | 128/63 |
312.5 | 64/315 | 128/155 | 256/375 | |
7, 8 | 125 | N/A | N/A | 32/13 |
390.625 | N/A | N/A | 256/375 | |
9, 10 | 156.25 | 32/33 | 64/31 | 128/63 |
390.625 | 64/155 | 128/185 | 256/375 | |
11, 12 | 312.5 | 16/15 | 32/33 | 64/63 |
390.625 | 64/75 | 128/185 | 256/253 | |
13 | 62.5 | 64/63 | 128/153 | 256/253 |
125 | 32/33 | 64/63 | 128/153 | |
14 | 62.5 | 32/33 | 64/63 | 128/153 |
156.25 | 64/155 | 128/155 | 256/375 | |
15 | 62.5 | 64/63 | 128/153 | 256/253 |
312.5 | 64/155 | 128/155 | 256/375 |
SYNC_MODE | Reference Clock Frequency (MHz) |
Sampling Clock Granularity (ns) | ||
---|---|---|---|---|
SAMPLE_SIZE = 64 | SAMPLE_SIZE = 128 | SAMPLE_SIZE = 256 | ||
0, 1 | 125 | 0.5 | 0.25 | 0.125 |
156.25 | ||||
2 | Master/target frequency | Ref clock period/64 | Ref clock period/128 | Ref clock period/256 |
3, 4 | 156.25 | 0.1 | 0.05 | 0.025 |
312.5 | ||||
5, 6 | 125 | 0.25 | 0.125 | 0.0625 |
312.5 | ||||
7, 8 | 125 | N/A | N/A | 0.25 |
390.625 | ||||
9, 10 | 156.25 | 0.2 | 0.1 | 0.05 |
390.625 | ||||
11, 12 | 312.5 | 0.2 | 0.1 | 0.05 |
390.625 | ||||
13 | 62.5 | 0.25 | 0.125 | 0.0625 |
125 | ||||
14 | 62.5 | 0.5 | 0.25 | 0.125 |
156.25 | ||||
15 | 62.5 | 0.25 | 0.125 | 0.0625 |
312.5 |
SYNC_MODE | Time of Day Frequency (MHz) |
Sampling Clock Granularity (ns) | ||
---|---|---|---|---|
SAMPLE_SIZE = 64 | SAMPLE_SIZE = 128 | SAMPLE_SIZE = 256 | ||
0, 1 | 125 | 0.5 | 0.5 | 0.5 |
156.25 | ||||
2 | 62.5 | 0.5 | 0.5 | 0.5 |
125 | 0.5 | 0.5 | 0.5 | |
156.25 | 0.1 | 0.1 | 0.1 | |
312.5 | 0.1 | 0.1 | 0.1 | |
390.625 | N/A | 0.02 | 0.02 | |
402.83 | N/A | N/A | N/A | |
3, 4 | 156.25 | 0.1 | 0.1 | 0.1 |
312.5 | ||||
5, 6 | 125 | 0.5 | 0.5 | 0.5 |
312.5 | ||||
7, 8 | 125 | N/A | 0.5 | 0.5 |
390.625 | ||||
9, 10 | 156.25 | N/A | 0.1 | 0.1 |
390.625 | ||||
11, 12 | 312.5 | N/A | 0.1 | 0.1 |
390.625 | ||||
13 | 62.5 | 0.5 | 0.5 | 0.5 |
125 | ||||
14 | 62.5 | 0.5 | 0.5 | 0.5 |
156.25 | ||||
15 | 62.5 | 0.5 | 0.5 | 0.5 |
312.5 |
Sampling Clock Factor | PLL Counter | ||
---|---|---|---|
M | N | C | |
16/15 | 16 | 5 | 3 |
16/63 | 16 | 3 | 21 |
32/13 | 32 | 13 | 1 |
32/33 | 32 | 3 | 11 |
32 | 11 | 3 | |
32/63 | 32 | 3 | 21 |
64/31 | 64 | 31 | 1 |
64/63 | 64 | 9 | 7 |
64 | 21 | 3 | |
64/75 | 64 | 25 | 3 |
64/155 | 64 | 31 | 5 |
64/315 | 64 | 21 | 15 |
128/63 | 128 | 21 | 3 |
128/153 | 128 | 51 | 3 |
128 | 17 | 9 | |
128 | 9 | 17 | |
128/155 | 128 | 31 | 5 |
128/185 | 128 | 37 | 5 |
256/253 | 256 | 11 | 23 |
256/375 | 256 | 75 | 5 |
256 | 25 | 15 |