Intel® Quartus® Prime Pro Edition User Guide: Programmer

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ID 683039
Date 4/03/2023
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Document Table of Contents
Document Table of Contents x
1. Answers to Top FAQs 2. Intel® Quartus® Prime Programmer User Guide 3. Using the Intel® Quartus® Prime Programmer 4. Using the HPS Flash Programmer A. Intel® Quartus® Prime Pro Edition User Guide: Programmer Document Archive B. Intel® Quartus® Prime Pro Edition User Guides
2. Intel® Quartus® Prime Programmer User Guide x
2.1. Generating Primary Device Programming Files 2.2. Generating Secondary Programming Files 2.3. Enabling Bitstream Security for Intel® Stratix® 10 and Intel® Agilex™ 7 Devices 2.4. Enabling Bitstream Encryption or Compression for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices 2.5. Generating Programming Files for Partial Reconfiguration 2.6. Generating Programming Files for Intel® FPGA Devices with Hard Processor Systems 2.7. Scripting Support 2.8. Generating Programming Files Revision History
2.2. Generating Secondary Programming Files x
2.2.1. Generating Secondary Programming Files (Programming File Generator) 2.2.2. Generating Secondary Programming Files (Convert Programming File Dialog Box) 2.2.3. Generating Secondary Programming Files (Settings: Programming Files Dialog Box)
2.2.1. Generating Secondary Programming Files (Programming File Generator) x
2.2.1.1. Configuration Modes (Programming File Generator) 2.2.1.2. Secondary Programming Files (Programming File Generator)
2.2.2. Generating Secondary Programming Files (Convert Programming File Dialog Box) x
2.2.2.1. Secondary Programming Files (Convert Programming Files) 2.2.2.2. Configuration Modes (Convert Programming Files) 2.2.2.3. Debugging the Configuration (Convert Programming Files)
2.3. Enabling Bitstream Security for Intel® Stratix® 10 and Intel® Agilex™ 7 Devices x
2.3.1. Enabling Bitstream Authentication (Programming File Generator) 2.3.2. Specifying Additional Physical Security Settings (Programming File Generator) 2.3.3. Enabling Bitstream Encryption (Programming File Generator)
2.5. Generating Programming Files for Partial Reconfiguration x
2.5.1. Generating PR Bitstream Files 2.5.2. Partial Reconfiguration Bitstream Compatibility Checking 2.5.3. Raw Binary Programming File Byte Sequence Transmission Examples 2.5.4. Generating a Merged .pmsf File from Multiple .pmsf Files ( Intel® Arria® 10 and Intel® Cyclone® 10 GX Designs)
2.6. Generating Programming Files for Intel® FPGA Devices with Hard Processor Systems x
2.6.1. Generating Programming Files for HPS Boot First Boot Flows 2.6.2. Generating Programming Files for FPGA Configuration First Boot Flows
2.7. Scripting Support x
2.7.1. quartus_pfg Command Line Tool 2.7.2. quartus_cpf Command Line Tool
2.7.2. quartus_cpf Command Line Tool x
2.7.2.1. Generating a Partial-Mask SRAM Object File using a Mask Settings File and a SRAM Object File
3. Using the Intel® Quartus® Prime Programmer x
3.1. Intel® Quartus® Prime Programmer 3.2. Programming and Configuration Modes 3.3. Basic Device Configuration Steps 3.4. Specifying the Programming Hardware Setup 3.5. Programming with Flash Loaders 3.6. Verifying the Programming File Source with Project Hash 3.7. Using PR Bitstream Security Verification ( Intel® Stratix® 10 Designs) 3.8. Stand-Alone Programmer 3.9. Programmer Settings Reference 3.10. Scripting Support 3.11. Using the Intel® Quartus® Prime Programmer Revision History
3.4. Specifying the Programming Hardware Setup x
3.4.1. JTAG Chain Debugger Tool 3.4.2. Editing the Details of an Unknown Device 3.4.3. Running JTAG Daemon with Linux
3.4.1. JTAG Chain Debugger Tool x
3.4.1.1. JTAG Chain Integrity Tab 3.4.1.2. JTAG Chain Debugging Tab
3.5. Programming with Flash Loaders x
3.5.1. Specifying Flash Partitions 3.5.2. Full Erase of Flash Memory Sectors
3.6. Verifying the Programming File Source with Project Hash x
3.6.1. Obtaining Project Hash for Intel® Arria® 10 Devices
3.8. Stand-Alone Programmer x
3.8.1. Stand-Alone Programmer Memory Consumption
3.9. Programmer Settings Reference x
3.9.1. Device & Pin Options Dialog Box 3.9.2. More Security Options Dialog Box 3.9.3. Output Files Tab Settings (Programming File Generator) 3.9.4. Input Files Tab Settings (Programming File Generator) 3.9.5. Bitstream Co-Signing Security Settings (Programming File Generator) 3.9.6. Configuration Device Tab Settings 3.9.7. Add Partition Dialog Box (Programming File Generator) 3.9.8. Add Filesystem Dialog Box (Programming File Generator) 3.9.9. Convert Programming File Dialog Box 3.9.10. Compression and Encryption Settings (Convert Programming File) 3.9.11. SOF Data Properties Dialog Box (Convert Programming File) 3.9.12. Select Devices (Flash Loader) Dialog Box
3.10. Scripting Support x
3.10.1. The jtagconfig Debugging Tool
4. Using the HPS Flash Programmer x
4.1. HPS Flash Programmer Command-Line Utility 4.2. How the HPS Flash Programmer Works 4.3. Using the Flash Programmer from the Command Line 4.4. Supported Memory Devices 4.5. HPS Flash Programmer User Guide Revision History
4.3. Using the Flash Programmer from the Command Line x
4.3.1. HPS Flash Programmer 4.3.2. HPS Flash Programmer Command Line Examples
1. Answers to Top FAQs
2. Intel® Quartus® Prime Programmer User Guide
3. Using the Intel® Quartus® Prime Programmer
4. Using the HPS Flash Programmer
A. Intel® Quartus® Prime Pro Edition User Guide: Programmer Document Archive
B. Intel® Quartus® Prime Pro Edition User Guides

3.11. Using the Intel® Quartus® Prime Programmer Revision History

Table 40.  Document Revision History
Date Intel® Quartus® Prime Version Changes
2023.04.03 23.1
  • Updated product family name to "Intel Agilex 7."
2022.09.26 22.3
  • Added "Add Filesystem Dialog Box".
  • Removed footnotes saying that security features are not available for Intel® Agilex™ 7 devices.

    For details about security features for Intel® Agilex™ 7 devices, refer to the Intel® Agilex™ 7 Device Security User Guide .

2021.07.21 21.2
  • Updated "JTAG Chain Debugger Tool".
  • Added "JTAG Chain Integrity".
  • Added "JTAG Chain Debugging".
2021.06.21 21.2
  • Updated "Scripting Support" with an additional example.
2020.05.26 19.4.0
  • Corrected descriptions of "Bus Speed Mode" and "Slave Device Type" power options.
2019.09.30 19.3.0
  • Updated "Device & pin Options" topic to reflect new Security settings tab.
  • Updated "Configuration Device Tab" topic to reflect Custom database directory option.
  • Referenced compilation support for Intel® Agilex™ 7 devices.
  • Added "More Security Options Dialog Box" topic.

  • Added new “Bitstream Co-Signing Security Settings” topic.

  • Updated "SOF File Properties: Bitstream Encryption Dialog Box" topic.

  • Added new steps to “Full Erase of Flash Memory Sectors” topic.

2019.06.10 19.1.0
  • Updated "Programming with Flash Loaders" topic to reflect new Generic Flash Programmer.
  • Removed references to obsolete 32-bit stand-alone Programmer.
  • Added "Erasing Flash Memory Sectors" topic describing complete erase of flash memory.
  • Added new "Programmer Settings Reference" section containing the following new GUI reference topics:
    • "Device & Pin Options Dialog Box"
    • "Input Files Tab Settings (Programming File Generator)"
    • "Output Files Tab Settings (Programming File Generator)"
    • "Configuration Device Tab Settings (Programming File Generator)"
    • "Add Partition Dialog Box (Programming File Generator)"
    • "Bitstream Compression, Authentication, and Encryption Settings (Programming File Generator)"
    • "Convert Programming Files Dialog Box"
    • "Bitstream Compression and Encryption Settings (Convert Programming File)"
    • "SOF Data Properties Dialog Box"
    • "Select Devices (Flash Loader) Dialog Box"
2019.04.01 19.1.0
  • Added new "Using PR Bitstream Security Verification" topic.
  • Added new "Basic Device Configuration Steps" topic.
  • Added new "Programming and Configuration Modes" topic.
  • Retitled and reorganized topics to improve flow of information.
  • Added enhanced diagram of Programmer to " Intel® Quartus® Prime Programmer" topic.
  • Updated screenshots.
2018.10.09 18.1.0
  • Created topic: Stand-Alone Programmer Memory Limitations from content in topic: Stand-Alone Programmer.
  • Removed outdated support information.
2018.08.07 18.0.0 Reverted document title to Programmer User Guide: Intel® Quartus® Prime Pro Edition .
2018.06.27 18.0.0
  • Moved information about programming file generator to new chapter: Generating Programming Files.
2018.05.07 18.0.0
  • First release as part of the stand-alone Programmer User Guide
2017.05.08 17.0.0
  • Added Project Hash feature.
2016.10.31 16.1.0
  • Implemented Intel® rebranding.
2015.11.02 15.1.0 Changed instances of Quartus II to Intel® Quartus® Prime software.
2015.05.04 15.0.0 Added Conversion Setup File (.cof) description and example.
December 2014 14.1.0 Updated the Scripting Support section to include a Linux command to program a device.
June 2014 14.0.0
  • Added Running JTAG Daemon.
  • Removed Cyclone III and Stratix III devices references.
  • Removed MegaWizard Plug-In Manager references.
  • Updated Secondary Programming Files section to add notes about the Quartus II Programmer support for .rbf files.
November 2013 13.1.0
  • Converted to DITA format.
  • Added JTAG Debug Mode for Partial Reconfiguration and Configuring Partial Reconfiguration Bitstream in JTAG Debug Mode sections.
November 2012 12.1.0
  • Updated Table 18–3 on page 18–6, and Table 18–4 on page 18–8.
  • Added “Converting Programming Files for Partial Reconfiguration” on page 18–10, “Generating .pmsf using a .msf and a .sof” on page 18–10, “Generating .rbf for Partial Reconfiguration Using a .pmsf” on page 18–12, “Enable Decompression during Partial Reconfiguration Option” on page 18–14
  • Updated “Scripting Support” on page 18–15.
June 2012 12.0.0
  • Updated Table 18–5 on page 18–8.
  • Updated “Quartus II Programmer GUI” on page 18–3.
November 2011 11.1.0
  • Updated “Configuration Modes” on page 18–5.
  • Added “Optional Programming or Configuration Files” on page 18–6.
  • Updated Table 18–2 on page 18–5.
May 2011 11.0.0
  • Added links to Quartus II Help.
  • Updated “Hardware Setup” on page 21–4 and “JTAG Chain Debugger Tool” on page 21–4.
December 2010 10.1.0
  • Changed to new document template.
  • Updated “JTAG Chain Debugger Example” on page 20–4.
  • Added links to Quartus II Help.
  • Reorganized chapter.
July 2010 10.0.0
  • Added links to Quartus II Help.
  • Deleted screen shots.
November 2009 9.1.0 No change to content.
March 2009 9.0.0
  • Added a row to Table 21–4.
  • Changed references from “JTAG Chain Debug” to “JTAG Chain Debugger”.
  • Updated figures.
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