Intel® High Level Synthesis Accelerator Functional Unit Design Example User Guide

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ID 683025
Date 7/19/2019
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Document Table of Contents
Document Table of Contents x
1. About the HLS AFU Design Example 2. Building the HLS AFU Design Example 3. Customizing the HLS AFU 4. HLS AFU Design Example Description 5. Troubleshooting HLS AFU Designs 6. Document Revision History for the HLS AFU Design Example User Guide
1. About the HLS AFU Design Example x
1.1. HLS AFU Design Example Files 1.2. Acronyms in the HLS AFU Design Example User Guide
2. Building the HLS AFU Design Example x
2.1. HLS AFU Design Example Software Requirements 2.2. Compiling and Simulating the HLS Component with the i++ Command 2.3. Generating a Platform Designer Container for the HLS Component 2.4. Generating the ASE Testbench 2.5. Running the ASE Testbench 2.6. Compiling the AF Bitstream 2.7. Loading AF Bitstream and Running the Host Application
3. Customizing the HLS AFU x
3.1. Acceleration Stack Configuration Files
4. HLS AFU Design Example Description x
4.1. AFU Description 4.2. Host Application Description
4.1. AFU Description x
4.1.1. HLS AFU Container
4.1.1. HLS AFU Container x
4.1.1.1. HLS AFU Avalon-MM I/O Slave Interface 4.1.1.2. HLS AFU Avalon-MM Master Interfaces
5. Troubleshooting HLS AFU Designs x
5.1. Platform Designer Opens with an Error 5.2. The design unit was not found Error When Running the make sim Command 5.3. Verilog HDL Compilation Errors 5.4. Compilation Errors During ASE Testbench Generation 5.5. Incorrect Output During Simulation 5.6. AF Bitstream Compilation Fails 5.7. Verilog Files Not Found Errors
1. About the HLS AFU Design Example
2. Building the HLS AFU Design Example
3. Customizing the HLS AFU
4. HLS AFU Design Example Description
5. Troubleshooting HLS AFU Designs
6. Document Revision History for the HLS AFU Design Example User Guide

5.4. Compilation Errors During ASE Testbench Generation

Make sure that you have correctly set up your system environment variables. Refer to Setting Up the Environment in the Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide .
Running the make utility from the build_ase_dir directory causes an error if the environment variables for your simulation software are not set. Ensure that you set the following environment variables, depending on your simulation software:
  • For Mentor ModelSim* SE* or Mentor Questa* Advanced Simulator:
    $ export MTI_HOME=<path to ModelSim/Questa installation directory>
$ export PATH=$MTI_HOME/linux_x86_64/:$MTI_HOME/bin/:$PATH

Even if you have the correct path information to your simulation software set in your PATH environment variables, the Acceleration Stack requires the simulator-specific environment variables to be set.

If the environment variables are not set correctly, running the make command, generates an error message as follows: 
In file included from /home/john/hls_afu/hls_afu/build_ase_dir/sw/linked_list_ops.c:36:0:
/home/john/hls_afu/hls_afu/build_ase_dir/sw/ase_common.h:66:19: fatal error: svdpi.h: No such file or directory
compilation terminated.
In file included from /home/john/hls_afu/hls_afu/build_ase_dir/sw/randomness_control.c:28:0:
/home/john/hls_afu/hls_afu/build_ase_dir/sw/ase_common.h:66:19: fatal error: svdpi.h: No such file or directory
compilation terminated.
make[1]: *** [sw_build] Error 1
make[1]: Leaving directory `/home/john/hls_afu/hls_afu/build_ase_dir'
make: *** [build] Error 2
If the environment variables are not set correctly, running the make sim command, generates an error message as follows: 
# ** Error: (vsim-3763) SystemVerilog DPI cannot access file './ase_libs.so'
# No such file or directory. (errno = ENOENT)
# Use the -help option for complete vsim usage.
# vsim -c -l run.log -dpioutoftheblue 1 -novopt -sv_lib ase_libs -do "/home/john/hls_afu/hls_afu/vsim_run.tcl" \
-sv_seed 1234 "+CONFIG=/home/john/hls_afu/hls_afu/ase.cfg" "+SCRIPT=/home/john/hls_afu/hls_afu/ase_regress.sh" ase_top 
# Error loading design
Error loading design
# Errors: 1, Warnings: 0
/bin/sh: line 0: cd: OLDPWD not set
make: *** [sim] Error 1
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