The first set of PTP performance benchmarks for Intel® FPGA PAC N3000 utilizes an IXIA* solution for network and PTP conformance testing. The IXIA XGS2 chassis box includes an IXIA 40 PORT NOVUS-R100GE8Q28 card and IxExplorer which provides a graphical interface for setting up a virtual PTP Grandmaster to the DUT ( Intel® FPGA PAC N3000) over a single 25 Gbps direct Ethernet connection. The block diagram below illustrates the targeted testing topology for the IXIA-based benchmarks.

All the results use IXIA-generated traffic for the ingress traffic tests and utilize the trafgen tool on the Intel® FPGA PAC N3000 host for the egress traffic tests, where the ingress or egress direction is always from the perspective of the DUT ( Intel® FPGA PAC N3000) host. In both cases, the average traffic rate is 24 Gbps.

This test setup provides a baseline characterization of the PTP performance of Intel® FPGA PAC N3000 with the T-TC mechanism enabled, as well as comparing it to the non-TC Intel® FPGA PAC N3000 factory image under the ITU-T G.8275.1 PTP profile.