IEEE 1588 V2 Test: Intel FPGA Programmable Acceleration Card N3000

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ID 683017
Date 5/30/2020
Public
Document Table of Contents
Document Table of Contents x
1. Introduction 2. IXIA Traffic Test 3. lperf3 Traffic Test 4. Conclusion 5. Document Revision History for IEEE 1588 V2 Test
1. Introduction x
1.1. Background 1.2. Objective 1.3. Features and Limitations 1.4. Tools and Driver Versions
2. IXIA Traffic Test x
2.1. IXIA Traffic Test Result
3. lperf3 Traffic Test x
3.1. lperf3 Traffic Test Result
1. Introduction
2. IXIA Traffic Test
3. lperf3 Traffic Test
4. Conclusion
5. Document Revision History for IEEE 1588 V2 Test

1.3. Features and Limitations

The features and validation limitations for the Intel® FPGA PAC N3000 IEEE1588v2 support are as following:
  • Software stack used: Linux PTP Project (PTP4l)
  • Supports the following telecom profiles:
    • 1588v2 (default)
    • G.8265.1
    • G.8275.1
  • Supports two-step PTP slave clock.
  • Supports end-to-end multicast mode.
  • Supports PTP message exchange frequency of up to 128 Hz.
    • This is a limitation of the validation plan and employed Grandmaster. PTP configurations higher than 128 packets per second for PTP messages might be possible.
  • Due to limitations of the Cisco* Nexus* 93180YC-FX switch used in the validation setup, the performance results under iperf3 traffic conditions refer to PTP message exchange rate of 8 Hz.
  • Encapsulation support:
    • Transport over L2 (raw Ethernet) and L3 (UDP/IPv4/IPv6)
Note: In this document, all results use a single 25Gbps Ethernet link.
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