1.2.1. Setting up the Hardware for Triple Rate SDI II VCXO Removal Reference Design
Complete the steps in the following topics to set up the required hardware for triple rate SDI II VCXO removal reference design.
Hardware and Software Requirements
The triple rate SDI II VCXO removal reference design requires the following hardware and software:
- Intel® Arria® 10 GX FPGA Development Board (10AX115S3F45E2SGE3)
- BNC plug to SMB plug cables
- SDI Signal Analyzer
- SDI Signal Generator
- Intel® Quartus® Prime version 16.0
Connecting the Development Board to the Cable Driver
Connect the J20 (RX port) to external video source and the J21 (TX port) to video scope using BNC plug to SMB plug cables.
Setting the DIP Switches
Set the DIP switches of the development board as specified in the following table.
DIP Switch | Schematic Signal Name | Description | Setting | |
---|---|---|---|---|
SW3 (PCIe*) |
1 | X1 | ON for PCIe X1 | ON |
2 | X4 | ON for PCIe X4 | ON | |
3 | X8 | ON for PCIe X8 | ON | |
4 | — | OFF for 1.35 V MEM_VDD power rail | OFF | |
SW4 (JTAG) |
1 | Arria 10 | OFF to enable the Intel® Arria® 10 device in the JTAG chain | OFF |
2 | MAX V | OFF to enable the MAX V device in the JTAG chain | OFF | |
3 | FMCA | ON to bypass the FMCA connector in the JTAG chain | ON | |
4 | FMCB | ON to bypass the FMCB connector in the JTAG chain | ON | |
SW5 (Configuration)2 |
1 | MSEL0 | ON for MSEL0 = 1; for FPP standard mode | OFF |
2 | MSEL1 | ON for MSEL1 = 0; for FPP standard mode | OFF | |
3 | MSEL2 | ON for MSEL2 = 0; for FPP standard mode | ON | |
4 | VIDEN | OFF for enabling VID_EN for the Smart Voltage ID (SmartVID) feature | ON | |
SW6 (Board Settings) |
1 | CLK_SEL | ON for 100 MHz on-board clock oscillator selection OFF for SMA input clock selection |
ON |
2 | CLK_EN | OFF for setting CLK_ENABLE signal high to the MAX V device | OFF | |
3 | Si516_FS | ON for setting the SDI REFCLK frequency to 148.35 MHz OFF for setting the SDI REFCLK frequency to 148.5 MHz |
OFF | |
4 | FACTORY | ON to load factory image from flash OFF to load user hardware from flash |
ON | |
5 | RZQ_B2K | ON for setting RZQ resistor of Bank 2K to 99.17 ohm OFF for setting RZQ resistor of Bank 2K to 240 ohm |
OFF |
Connecting the Hardware to the Power Supplies
Connect the development board to the 12V DC input (J13) power supply.
Port Assignments
When you set up the hardware, the following physical ports are assigned to the SDI channels.
SDI Channel | Hardware | RX Port | TX Port |
---|---|---|---|
0 | Arria 10 GX development board | SDI_RX_P (J20) | SDI_TX_P (J21) |