Visible to Intel only — GUID: GUID-1E91DFFD-D7CD-4AF5-B911-7E5D1CCDBBA5
Alphabetical Option List
General Rules for Compiler Options
What Appears in the Compiler Option Descriptions
Optimization Options
Code Generation Options
Interprocedural Optimization Options
Advanced Optimization Options
Profile Guided Optimization Options
Optimization Report Options
Offload Compilation, OpenMP*, and Parallel Processing Options
Floating-Point Options
Inlining Options
Output, Debug, and Precompiled Header Options
Preprocessor Options
Component Control Options
Language Options
Data Options
Compiler Diagnostic Options
Compatibility Options
Linking or Linker Options
Miscellaneous Options
Deprecated and Removed Compiler Options
Display Option Information
Alternate Compiler Options
Portability and GCC-Compatible Warning Options
arch
ax, Qax
EH
fasynchronous-unwind-tables
fcf-protection, Qcf-protection
fdata-sections, Gw
fexceptions
ffunction-sections, Gy
fomit-frame-pointer
Gd
GR
guard
Gv
m, Qm
m64, Qm64
m80387
march
masm
mauto-arch, Qauto-arch
mbranches-within-32B-boundaries, Qbranches-within-32B-boundaries
mintrinsic-promote, Qintrinsic-promote
momit-leaf-frame-pointer
mtune, tune
regcall, Qregcall
x, Qx
xHost, QxHost
ffreestanding, Qfreestanding
fjump-tables
fvec-peel-loops, Qvec-peel-loops
fvec-remainder-loops, Qvec-remainder-loops
fvec-with-mask, Qvec-with-mask
ipp-link, Qipp-link
mno-gather, Qgather-
mno-scatter, Qscatter-
qactypes, Qactypes
qdaal, Qdaal
qipp, Qipp
qmkl, Qmkl
qmkl-ilp64, Qmkl-ilp64
qopt-assume-no-loop-carried-dep, Qopt-assume-no-loop-carried-dep
qopt-dynamic-align, Qopt-dynamic-align
qopt-for-throughput, Qopt-for-throughput
qopt-mem-layout-trans, Qopt-mem-layout-trans
qopt-multiple-gather-scatter-by-shuffles, Qopt-multiple-gather-scatter-by-shuffles
qopt-prefetch, Qopt-prefetch
qopt-streaming-stores, Qopt-streaming-stores
qtbb, Qtbb
unroll, Qunroll
use-intel-optimized-headers, Quse-intel-optimized-headers
vec, Qvec
vec-threshold, Qvec-threshold
device-math-lib
fintelfpga
fiopenmp, Qiopenmp
flink-huge-device-code
fno-sycl-libspirv
foffload-static-lib
fopenmp
fopenmp-declare-target-scalar-defaultmap, Qopenmp-declare-target-scalar-defaultmap
fopenmp-device-lib
fopenmp-target-buffers, Qopenmp-target-buffers
fopenmp-targets, Qopenmp-targets
fsycl
fsycl-add-targets
fsycl-dead-args-optimization
fsycl-device-code-split
fsycl-device-lib
fsycl-device-obj
fsycl-device-only
fsycl-early-optimizations
fsycl-enable-function-pointers
fsycl-esimd-force-stateless-mem
fsycl-explicit-simd
fsycl-force-target
fsycl-help
fsycl-host-compiler
fsycl-host-compiler-options
fsycl-id-queries-fit-in-int
fsycl-instrument-device-code
fsycl-link
fsycl-link-huge-device-code
fsycl-link-targets
fsycl-max-parallel-link-jobs
fsycl-optimize-non-user-code
fsycl-rdc
fsycl-targets
fsycl-unnamed-lambda
fsycl-use-bitcode
ftarget-compile-fast
nolibsycl
qopenmp, Qopenmp
qopenmp-link
qopenmp-simd, Qopenmp-simd
qopenmp-stubs, Qopenmp-stubs
reuse-exe
Wno-sycl-strict
Xopenmp-target
Xs
Xsycl-target
ffp-contract
fimf-absolute-error, Qimf-absolute-error
fimf-accuracy-bits, Qimf-accuracy-bits
fimf-arch-consistency, Qimf-arch-consistency
fimf-domain-exclusion, Qimf-domain-exclusion
fimf-max-error, Qimf-max-error
fimf-precision, Qimf-precision
fimf-use-svml, Qimf-use-svml
fma, Qfma
fp-model, fp
fp-speculation, Qfp-speculation
ftz, Qftz
pc, Qpc
w
w, W
Wabi
Wall
Wcheck-unicode-security
Wcomment
Wdeprecated
Weffc++, Qeffc++
Werror, WX
Werror-all
Wextra-tokens
Wformat
Wformat-security
Wmain
Wmissing-declarations
Wmissing-prototypes
Wpointer-arith
Wreorder
Wreturn-type
Wshadow
Wsign-compare
Wstrict-aliasing
Wstrict-prototypes
Wtrigraphs
Wuninitialized
Wunknown-pragmas
Wunused-function
Wunused-variable
Wwrite-strings
Create Libraries
Use Intel Shared Libraries on Linux
Manage Libraries
Redistribute Libraries When Deploying Applications
Resolve References to Shared Libraries
Intel's Memory Allocator Library
SIMD Data Layout Templates
Intel® C++ Class Libraries
Intel's C++ Asynchronous I/O Extensions for Windows
IEEE 754-2008 Binary Floating-Point Conformance Library
Intel's Numeric String Conversion Library
Terms and Syntax
Rules for Operators
Assignment Operator
Logical Operators
Addition and Subtraction Operators
Multiplication Operators
Shift Operators
Comparison Operators
Conditional Select Operators
Debug Operations
Unpack Operators
Pack Operators
Clear MMX™ State Operator
Integer Functions for Intel® Streaming SIMD Extensions
Conversions between Fvec and Ivec
Fvec Syntax and Notation
Data Alignment
Conversions
Constructors and Initialization
Arithmetic Operators
Minimum and Maximum Operators
Logical Operators
Compare Operators
Conditional Select Operators for Fvec Classes
Cacheability Support Operators
Debug Operations
Load and Store Operators
Unpack Operators
Move Mask Operators
aio_read
aio_write
Example for aio_read and aio_write Functions
aio_suspend
Example for aio_suspend Function
aio_error
aio_return
Example for aio_error and aio_return Functions
aio_fsync
aio_cancel
Example for aio_cancel Function
lio_listio
Example for lio_listio Function
Asynchronous I/O Function Errors
Intel® IEEE 754-2008 Binary Floating-Point Conformance Library and Usage
Function List
Homogeneous General-Computational Operations Functions
General-Computational Operation Functions
Quiet-Computational Operations Functions
Signaling-Computational Operations Functions
Non-Computational Operations Functions
Compilation Overview
Supported Environment Variables
Pass Options to the Linker
Specify Alternate Tools and Paths
Use Configuration Files
Use Response Files
Global Symbols and Visibility Attributes for Linux*
Save Compiler Information in Your Executable
Link Debug Information
Ahead of Time Compilation
Device Offload Compilation Considerations
Use a Third-Party Compiler as a Host Compiler for SYCL Code
Visible to Intel only — GUID: GUID-1E91DFFD-D7CD-4AF5-B911-7E5D1CCDBBA5
Offload Compilation, OpenMP*, and Parallel Processing Options
This section contains descriptions for compiler options that pertain to offload compilation, OpenMP*, or parallel processing. They are listed in alphabetical order.
Parent topic: Compiler Options
- device-math-lib
Enables or disables certain device libraries. This is a deprecated option that may be removed in a future release. - fintelfpga
Lets you perform ahead-of-time (AOT) compilation for the Field Programmable Gate Array (FPGA). - fiopenmp, Qiopenmp
Enables recognition of OpenMP* features, such as parallel, simd, and offloading directives. This is an alternate option for compiler option [Q or q]openmp. - flink-huge-device-code
Tells the compiler to place device code later in the linked binary. This is to prevent 32-bit PC-relative relocations between surrounding Executable and Linkable Format (ELF) sections when the device code is larger than 2GB. - fno-sycl-libspirv
Disables the check for libspirv (the SPIR-V* tools library). - foffload-static-lib
Tells the compiler to link with a fat (multi-architecture) static library. This is a deprecated option that may be removed in a future release. - fopenmp
Option -fopenmp is a deprecated option that will be removed in a future release. - fopenmp-declare-target-scalar-defaultmap, Qopenmp-declare-target-scalar-defaultmap
Determines which implicit data-mapping/sharing rules are applied for a scalar variable referenced in a target pragma. - fopenmp-device-lib
Enables or disables certain device libraries for an OpenMP* target. - fopenmp-target-buffers, Qopenmp-target-buffers
Enables a way to overcome the problem where some OpenMP* offload SPIR-V* devices produce incorrect code when a target object is larger than 4GB. - fopenmp-targets, Qopenmp-targets
Enables offloading to a specified GPU target if OpenMP* features have been enabled. - fsycl
Enables a program to be compiled as a SYCL program rather than as plain C++11 program. - fsycl-add-targets
Lets you add arbitrary device binary images to the fat SYCL* binary when linking. This is a deprecated option that may be removed in a future release. - fsycl-dead-args-optimization
Enables elimination of SYCL dead kernel arguments. - fsycl-device-code-split
Specifies a SYCL* device code module assembly. - fsycl-device-lib
Enables or disables certain device libraries for a SYCL* target. - fsycl-device-obj
Lets you specify the format of device code stored in a resulting object. This is an experimental feature. - fsycl-device-only
Tells the compiler to generate a device-only binary. - fsycl-early-optimizations
Enables LLVM-related optimizations before SPIR-V* generation. - fsycl-enable-function-pointers
Enables function pointers and support for virtual functions for SYCL kernels and device functions. This is an experimental feature. - fsycl-esimd-force-stateless-mem
Determines whether the compiler enforces stateless memory accesses within ESIMD kernels on the target device. This is an experimental feature. - fsycl-explicit-simd
Enables or disables the experimental "Explicit SIMD" SYCL* extension. This is a deprecated option that may be removed in a future release. - fsycl-force-target
Forces the compiler to use the specified target triple device when extracting device code from any given objects on the command line. - fsycl-help
Causes help information to be emitted from the device compiler backend. - fsycl-host-compiler
Tells the compiler to use the specified compiler for the host compilation of the overall offloading compilation that is performed. - fsycl-host-compiler-options
Passes options to the compiler specified by option fsycl-host-compiler. - fsycl-id-queries-fit-in-int
Tells the compiler to assume that SYCL ID queries fit within MAX_INT. - fsycl-instrument-device-code
Enables or disables linking of the Instrumentation and Tracing Technology (ITT) device libraries for VTune™. - fsycl-link
Tells the compiler to perform a partial link of device binaries to be used with Field Programmable Gate Array (FPGA). - fsycl-link-huge-device-code
Tells the compiler to place device code later in the linked binary. This is to prevent 32-bit PC-relative relocations between surrounding Executable and Linkable Format (ELF) sections when the device code is larger than 2GB. This is a deprecated option that will be removed in a future release. - fsycl-link-targets
Tells the compiler to link only device code. This is a deprecated option that may be removed in a future release. - fsycl-max-parallel-link-jobs
Tells the compiler that it can simultaneously spawn up to the specified number of processes to perform actions required to link SYCL applications. This is an experimental feature. - fsycl-optimize-non-user-code
Tells the compiler to optimize SYCL framework utility functions and to leave the kernel code unoptimized for further debugging. - fsycl-rdc
Determines whether the compiler generates device code in one module (normal behavior) or it generates separate device code per source. - fsycl-targets
Tells the compiler to generate code for specified device targets. - fsycl-unnamed-lambda
Enables unnamed SYCL* lambda kernels. - fsycl-use-bitcode
Tells the compiler to produce device code in LLVM Intermediate Representation (IR) bitcode format into fat objects. - ftarget-compile-fast
Tells the compiler to perform less aggressive optimizations to reduce compilation time at the expense of generating less optimal target code. This is an experimental feature. - nolibsycl
Disables linking of the SYCL* runtime library. - qopenmp, Qopenmp
Enables recognition of OpenMP* features and tells the parallelizer to generate multi-threaded code based on OpenMP* directives. - qopenmp-link
Controls whether the compiler links to static or dynamic OpenMP* runtime libraries. - qopenmp-simd, Qopenmp-simd
Enables or disables OpenMP* SIMD compilation. - qopenmp-stubs, Qopenmp-stubs
Enables compilation of OpenMP* programs in sequential mode. - reuse-exe
Tells the compiler to speed up Field Programmable Gate Array (FPGA) target compile time by reusing a previously compiled FPGA hardware image. - Wno-sycl-strict
Disables warnings that enforce strict SYCL* language compatibility. - Xopenmp-target
Enables options to be passed to the specified tool in the device compilation tool chain for the target. - Xs
Passes options to the backend tool. - Xsycl-target
Enables options to be passed to the specified tool in the device compilation tool chain for the target.