noc_ccu_ios_soc2fpga_main_Probe Address Map

Module Instance Base Address End Address
i_noc_ccu_ios_probe_soc2fpga_main_Probe 0xFFD22C00 0xFFD22FFF
Register Offset Width Access Reset Value Description
probe_soc2fpga_main_Probe_Id_CoreId 0x0 32 RO 0xBF79DA06 
SoC2FPGA Probe Core ID Register
probe_soc2fpga_main_Probe_Id_RevisionId 0x4 32 RO 0x00014800 
SoC2FPGA Probe Revision ID Register
probe_soc2fpga_main_Probe_MainCtl 0x8 32 RW 0x00000000 
Register MainCtl contains probe global control bits. The register has seven bit fields:
probe_soc2fpga_main_Probe_CfgCtl 0xC 32 RW 0x00000000 
SoC2FPGA Probe Configuration Control Register
probe_soc2fpga_main_Probe_TracePortSel 0x10 32 RW 0x00000000 
SoC2FPGA Probe Trace Port Select Register
probe_soc2fpga_main_Probe_FilterLut 0x14 32 RW 0x00000000 
SoC2FPGA Probe Filter Lookup Table Register
probe_soc2fpga_main_Probe_TraceAlarmEn 0x18 32 RW 0x00000000 
SoC2FPGA Probe Trace Alarm Enable Register
probe_soc2fpga_main_Probe_TraceAlarmStatus 0x1C 32 RO 0x00000000 
SoC2FPGA Probe Trace Alarm Status Register
probe_soc2fpga_main_Probe_TraceAlarmClr 0x20 32 RW 0x00000000 
SoC2FPGA Probe Trace Alarm Clear Register
probe_soc2fpga_main_Probe_StatPeriod 0x24 32 RW 0x00000000 
SoC2FPGA Probe Statistics Period Register
probe_soc2fpga_main_Probe_StatGo 0x28 32 RW 0x00000000 
SoC2FPGA Probe Statistics Collection Register
probe_soc2fpga_main_Probe_StatAlarmMin 0x2C 32 RW 0x00000000 
SoC2FPGA Probe Statistics Alarm Minimum Register
probe_soc2fpga_main_Probe_StatAlarmMax 0x30 32 RW 0x00000000 
SoC2FPGA Probe Statistics Alarm Maximum Register
probe_soc2fpga_main_Probe_StatAlarmStatus 0x34 32 RO 0x00000000 
SoC2FPGA Probe Statistics Alarm Status Register
probe_soc2fpga_main_Probe_StatAlarmClr 0x38 32 RW 0x00000000 
SoC2FPGA Probe Statistics Alarm Clear Register
probe_soc2fpga_main_Probe_StatAlarmEn 0x3C 32 RW 0x00000001 
SoC2FPGA Probe Statistics Alarm Enable Register
probe_soc2fpga_main_Probe_Filters_0_RouteIdBase 0x44 32 RW 0x00000000 
SoC2FPGA Probe Filter 0 Route ID Base Register
probe_soc2fpga_main_Probe_Filters_0_RouteIdMask 0x48 32 RW 0x00000000 
SoC2FPGA Probe Filter 0 Route ID Mask Register
probe_soc2fpga_main_Probe_Filters_0_AddrBase_Low 0x4C 32 RW 0x00000000 
SoC2FPGA Probe Filter 0 Address Base Low Register
probe_soc2fpga_main_Probe_Filters_0_AddrBase_High 0x50 32 RW 0x00000000 
SoC2FPGA Probe Filter 0 Address Base High Register
probe_soc2fpga_main_Probe_Filters_0_WindowSize 0x54 32 RW 0x00000000 
SoC2FPGA Probe Filter 0 Window Size Register
probe_soc2fpga_main_Probe_Filters_0_SecurityBase 0x58 32 RW 0x00000000 
SoC2FPGA Probe Filter 0 Security Base Register
probe_soc2fpga_main_Probe_Filters_0_SecurityMask 0x5C 32 RW 0x00000000 
SoC2FPGA Probe Filter 0 Security Mask Register
probe_soc2fpga_main_Probe_Filters_0_Opcode 0x60 32 RW 0x00000000 
	Packet Probe register Opcode is a 4-bit register that selects candidate packets based on packet opcodes (0 disables the filter):
probe_soc2fpga_main_Probe_Filters_0_Status 0x64 32 RW 0x00000000 
Register Status is 2-bit register that selects candidate packets based on packet status.
probe_soc2fpga_main_Probe_Filters_0_Length 0x68 32 RW 0x00000000 
SoC2FPGA Probe Filter 0 Length Register
probe_soc2fpga_main_Probe_Filters_0_Urgency 0x6C 32 RW 0x00000000 
SoC2FPGA Probe Filter 0 Urgency Register
probe_soc2fpga_main_Probe_Filters_1_RouteIdBase 0x80 32 RW 0x00000000 
SoC2FPGA Probe Filter 1 Route ID Base Register
probe_soc2fpga_main_Probe_Filters_1_RouteIdMask 0x84 32 RW 0x00000000 
SoC2FPGA Probe Filter 1 Route ID Mask Register
probe_soc2fpga_main_Probe_Filters_1_AddrBase_Low 0x88 32 RW 0x00000000 
SoC2FPGA Probe Filter 1 Address Base Low Register
probe_soc2fpga_main_Probe_Filters_1_AddrBase_High 0x8C 32 RW 0x00000000 
SoC2FPGA Probe Filter 1 Address Base High Register
probe_soc2fpga_main_Probe_Filters_1_WindowSize 0x90 32 RW 0x00000000 
SoC2FPGA Probe Filter 1 Window Size Register
probe_soc2fpga_main_Probe_Filters_1_SecurityBase 0x94 32 RW 0x00000000 
SoC2FPGA Probe Filter 1 Security Base Register
probe_soc2fpga_main_Probe_Filters_1_SecurityMask 0x98 32 RW 0x00000000 
SoC2FPGA Probe Filter 1 Security Mask Register
probe_soc2fpga_main_Probe_Filters_1_Opcode 0x9C 32 RW 0x00000000 
	Packet Probe register Opcode is a 4-bit register that selects candidate packets based on packet opcodes (0 disables the filter):
probe_soc2fpga_main_Probe_Filters_1_Status 0xA0 32 RW 0x00000000 
Register Status is 2-bit register that selects candidate packets based on packet status.
probe_soc2fpga_main_Probe_Filters_1_Length 0xA4 32 RW 0x00000000 
SoC2FPGA Probe Filter 1 Length Register
probe_soc2fpga_main_Probe_Filters_1_Urgency 0xA8 32 RW 0x00000000 
SoC2FPGA Probe Filter 1 Urgency Register
probe_soc2fpga_main_Probe_Counters_0_PortSel 0x134 32 RW 0x00000000 
SoC2FPGA Probe Counter 0 Port Select Register
probe_soc2fpga_main_Probe_Counters_0_Src 0x138 32 RW 0x00000000 
	Register CntSrc indicates the event source used to increment the counter. Unassigned values (non-existing Press level or ExtEvent index, or unimplemented Filter) are equivalent to OFF.
probe_soc2fpga_main_Probe_Counters_0_AlarmMode 0x13C 32 RW 0x00000000 
SoC2FPGA Probe Counter 0 Alarm Mode Register
probe_soc2fpga_main_Probe_Counters_0_Val 0x140 32 RO 0x00000000 
SoC2FPGA Probe Counter 0 Value Register
probe_soc2fpga_main_Probe_Counters_1_PortSel 0x148 32 RW 0x00000000 
SoC2FPGA Probe Counter 1 Port Select Register
probe_soc2fpga_main_Probe_Counters_1_Src 0x14C 32 RW 0x00000000 
	Register CntSrc indicates the event source used to increment the counter. Unassigned values (non-existing Press level or ExtEvent index, or unimplemented Filter) are equivalent to OFF.
probe_soc2fpga_main_Probe_Counters_1_AlarmMode 0x150 32 RW 0x00000000 
SoC2FPGA Probe Counter 1 Alarm Mode Register
probe_soc2fpga_main_Probe_Counters_1_Val 0x154 32 RO 0x00000000 
SoC2FPGA Probe Counter 1 Value Register
probe_soc2fpga_main_Probe_Counters_2_PortSel 0x15C 32 RW 0x00000000 
SoC2FPGA Probe Counter 2 Port Select Register
probe_soc2fpga_main_Probe_Counters_2_Src 0x160 32 RW 0x00000000 
	Register CntSrc indicates the event source used to increment the counter. Unassigned values (non-existing Press level or ExtEvent index, or unimplemented Filter) are equivalent to OFF.
probe_soc2fpga_main_Probe_Counters_2_AlarmMode 0x164 32 RW 0x00000000 
SoC2FPGA Probe Counter 2 Alarm Mode Register
probe_soc2fpga_main_Probe_Counters_2_Val 0x168 32 RO 0x00000000 
SoC2FPGA Probe Counter 2 Value Register
probe_soc2fpga_main_Probe_Counters_3_PortSel 0x170 32 RW 0x00000000 
SoC2FPGA Probe Counter 3 Port Select Register
probe_soc2fpga_main_Probe_Counters_3_Src 0x174 32 RW 0x00000000 
	Register CntSrc indicates the event source used to increment the counter. Unassigned values (non-existing Press level or ExtEvent index, or unimplemented Filter) are equivalent to OFF.
probe_soc2fpga_main_Probe_Counters_3_AlarmMode 0x178 32 RW 0x00000000 
SoC2FPGA Probe Counter 3 Alarm Mode Register
probe_soc2fpga_main_Probe_Counters_3_Val 0x17C 32 RO 0x00000000 
SoC2FPGA Probe Counter 3 Value Register