probe_soc2fpga_main_Probe_StatAlarmClr

         SoC2FPGA Probe Statistics Alarm Clear Register
      
Module Instance Base Address Register Address
i_noc_ccu_ios_probe_soc2fpga_main_Probe 0xFFD22C00 0xFFD22C38

Size: 32

Offset: 0x38

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

STATALARMCLR

RW 0x0

probe_soc2fpga_main_Probe_StatAlarmClr Fields

Bit Name Description Access Reset
0 STATALARMCLR
Register StatAlarmClr is a 1-bit register. Writing a 1 to this register clears the StatAlarmStatus register bit.When parameter statisticsCounterAlarm is set to False, StatAlarmClr is reserved.NOTE  The written value is not stored in StatAlarmClr. A read always returns 0.
RW 0x0