probe_soc2fpga_main_Probe_FilterLut

         SoC2FPGA Probe Filter Lookup Table Register
      
Module Instance Base Address Register Address
i_noc_ccu_ios_probe_soc2fpga_main_Probe 0xFFD22C00 0xFFD22C14

Size: 32

Offset: 0x14

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

FILTERLUT

RW 0x0

probe_soc2fpga_main_Probe_FilterLut Fields

Bit Name Description Access Reset
3:0 FILTERLUT
Register FilterLut contains a look-up table that is used to combine filter outputs in order to trace packets. Packet tracing is enabled when the FilterLut bit of index (FNout ... F0out) is equal to 1.The number of bits in register FilterLut is determined by the setting for parameter nFilter, calculated as 2**nFilter.When parameter nFilter is set to None, FilterLut is reserved.
RW 0x0