watchdog Address Map

Module Instance	Base Address	End Address
`i_watchdog_0_l4wd`	`0xFFD00200`	`0xFFD002FF`
`i_watchdog_1_l4wd`	`0xFFD00300`	`0xFFD01FFF`

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.

Register	Offset	Width	Access	Reset Value	Description
`wdt_cr`	`0x0`	`32`	`RW`	`0x0`	Control Register
`wdt_torr`	`0x4`	`32`	`RW`	`0xFF`	Timeout Range Register
`wdt_ccvr`	`0x8`	`32`	`RO`	`0x7FFFFFFF`	Current Counter Value Register.
`wdt_crr`	`0xC`	`32`	`WO`	`0x0`	Counter Restart Register.
`wdt_stat`	`0x10`	`32`	`RO`	`0x0`	Interrupt Status Register.
`wdt_eoi`	`0x14`	`32`	`RO`	`0x0`	Interrupt Clear Register.
`cp_wdt_user_top_max`	`0xE4`	`32`	`RO`	`0x0`	Component Parameters Register 5
`cp_wdt_user_top_init_max`	`0xE8`	`32`	`RO`	`0x0`	Component Parameters Register 4
`cd_wdt_top_rst`	`0xEC`	`32`	`RO`	`0xFF`	Component Parameters Register 3
`cp_wdt_cnt_rst`	`0xF0`	`32`	`RO`	`0x7FFFFFFF`	Component Parameters Register 2
`wdt_comp_param_1`	`0xF4`	`32`	`RO`	`0x10FF0254`	Component Parameters Register 1
`wdt_comp_version`	`0xF8`	`32`	`RO`	`0x3130372A`	Component Version Register
`wdt_comp_type`	`0xFC`	`32`	`RO`	`0x44570120`	Component Type Register