wdt_crr
Counter Restart Register.
| Module Instance | Base Address | Register Address |
|---|---|---|
| i_watchdog_0_l4wd | 0xFFD00200 | 0xFFD0020C |
| i_watchdog_1_l4wd | 0xFFD00300 | 0xFFD0030C |
Offset: 0xC
Access: WO
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
wdt_crr WO 0x0 |
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wdt_crr Fields
| Bit | Name | Description | Access | Reset | ||||
|---|---|---|---|---|---|---|---|---|
| 7:0 | wdt_crr | This register is used to restart the WDT counter. As a safety feature to prevent accidental restarts, the value 0x76 must be written. A restart also clears the WDT interrupt. Reading this register returns zero.
|
WO | 0x0 |