GTS Transceiver PHY User Guide: Agilex™ 5 FPGAs and SoCs

ID 817660
Date 4/07/2025
Public

Visible to Intel only — GUID: hfb1708642233758

Ixiasoft

Document Table of Contents

3.14. Hardware Configuration Using the Avalon® Memory-Mapped Interface

You can configure the GTS PMAs into several settings and modes using the Avalon memory-mapped interface. The examples and addressing format usage discussed in this section assumes that you are using the Tools > System Debugging Tools > System Console tool in Quartus® Prime Pro Edition software to access the registers in the GTS PMA and PMA/FEC Direct PHY Soft CSR. The addressing format discussed in this section are byte addressing. You can use the following methods to configure the specified registers:
  • Direct Register Method
  • GTS Attribute Access Method