F-Tile Low Latency 50G Ethernet Intel® FPGA IP Release Notes

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ID 778602
Date 7/08/2024
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1. F-Tile Low Latency 50G Intel FPGA IP Release Notes
1. F-Tile Low Latency 50G Intel FPGA IP Release Notes x
1.1. F-Tile Low Latency 50G Ethernet Intel® FPGA IP v6.0.0 1.2. F-Tile Low Latency 50G Ethernet Intel® FPGA IP v5.0.0 1.3. F-Tile Low Latency 50G Ethernet Intel® FPGA IP v4.0.0 1.4. F-Tile Low Latency 50G Ethernet Intel® FPGA IP v3.0.0 1.5. F-Tile Low Latency 50G Ethernet Intel® FPGA IP v2.0.0 1.6. F-Tile Low Latency 50G Ethernet Intel FPGA IP v1.0.1 1.7. F-Tile Low Latency 50G Ethernet Intel FPGA IP v1.0.0
1. F-Tile Low Latency 50G Intel FPGA IP Release Notes

1.4. F-Tile Low Latency 50G Ethernet Intel® FPGA IP v3.0.0

Table 4.  v3.0.0 2023.10.02
Quartus® Prime Version Description Impact
23.3 Added a new tab for Analog Parameter setting in F-Tile Low Latency 50G Ethernet  Intel® FPGA IP IP parameter editor. You may use the Analog Parameter tab to set FGT parameters such as TX EQ, Rx termination, Rx AC couple, and VSR mode.
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