Ethernet Subsystem Intel® FPGA IP Release Notes

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ID 776967
Date 4/15/2024
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1. Ethernet Subsystem Intel® FPGA IP Release Notes
1. Ethernet Subsystem Intel® FPGA IP Release Notes x
1.1. Ethernet Subsystem Intel® FPGA IP v25.0.0 1.2. Ethernet Subsystem Intel® FPGA IP v24.0.0 1.3. Ethernet Subsystem Intel® FPGA IP v23.0.0 1.4. Ethernet Subsystem Intel® FPGA IP v22.6.0 1.5. Ethernet Subsystem Intel® FPGA IP v22.5.0 1.6. Ethernet Subsystem Intel® FPGA IP User Guide Archives
1. Ethernet Subsystem Intel® FPGA IP Release Notes

1.2. Ethernet Subsystem Intel® FPGA IP v24.0.0

Table 2.  v24.0.0 2023.12.04
Quartus® Prime Version Description Impact
23.4 Added Auto Negotiation Link Training (AN/LT) support to Dynamic Reconfiguration (DR) for F-Tile. You can now perform dynamic reconfiguration between F-Tile designs that supports AN/LT for all speeds ranging from 10GE to 400GE.
Added Priority-based Flow Control (PFC) support for F-Tile. Priority-based Flow Control (PFC) is now available for F-Tile designs with speeds up to 100GE in single packet mode, excluding Dynamic Reconfiguration (DR) support.
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