FPGA AI Suite: Version 2024.1 Release Notes

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ID 772497
Date 3/29/2024
Public
Document Table of Contents x
1. FPGA AI Suite Version 2024.1 Release Notes 2. FPGA AI Suite New Features and Enhancements 3. Changes in Software Behavior 4. Bug Fixes 5. Known Issues and Workarounds 6. FPGA AI Suite Installation Flows 7. Supported Models A. FPGA AI Suite Release Notes Archives B. FPGA AI Suite Version 2024.1 Release Notes Revision History
1. FPGA AI Suite Version 2024.1 Release Notes
2. FPGA AI Suite New Features and Enhancements
3. Changes in Software Behavior
4. Bug Fixes
5. Known Issues and Workarounds
6. FPGA AI Suite Installation Flows
7. Supported Models
A. FPGA AI Suite Release Notes Archives
B. FPGA AI Suite Version 2024.1 Release Notes Revision History

3. Changes in Software Behavior

The FPGA AI Suite compiler (dla_compiler) now only moves a subgraph to the FPGA device if the subgraph includes at least two layers. This threshold is controlled by the -fmin-subgraph-layers compiler command option. This change helps to avoid excessively switching between a host CPU and the FPGA during inference, when using the HETERO:FPGA,CPU option.

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