Intel® FPGA AI Suite: IP Reference Manual

ID 768974
Date 9/06/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

5.1. Discovery ROM

The discovery ROM stores metadata. The metadata includes a hash for the architecture that the IP corresponds to and the Intel® FPGA AI Suite version that was used to create the IP.

The host runtime can use this information to determine whether the incoming inference job can be run on the IP instances. For example, if the architectures do not match each other, then inference is not possible.

The layout of the discovery ROM is as follows:

Table 9.  Discovery ROM Layout
Base Byte Address Length (in bytes) Feature

0x000

16

Hash of the Architecture Description File (.arch)

0x010

32

Human-readable Intel® FPGA AI Suite version string