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1. Intel® FPGA AI Suite Compiler Reference Manual
2. About the Intel® FPGA AI Suite Compiler
3. Intel® FPGA AI Suite Compiler Use Modes
4. Intel® FPGA AI Suite Compiler Command Line Options
A. Intel® FPGA AI Suite Compiler Reference Manual Archives
B. Intel® FPGA AI Suite Compiler Reference Manual Document Revision History
4.1. Inputs (dla_compiler Command Options)
4.2. Outputs (dla_compiler Command Options)
4.3. Reporting (dla_compiler Command Options)
4.4. Compilation Options (dla_compiler Command Options)
4.5. Architecture Options (dla_compiler Command Options)
4.6. Architecture Optimizer Options (dla_compiler Command Options)
4.7. Analyzer Tool Options (dla_compiler Command Options)
4.8. Miscellaneous Options (dla_compiler Command Options)
4.9. Input File Formats for dla_compiler Command
4.10. Generation of Output File Formats
4.11. The Partitioning Table Report
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3.5. Generating an Optimized Architecture
You can generate an optimized architecture in two ways: optimize the architecture for the highest performance subject to a constraint on the maximum allowable FPGA area or optimize the architecture for the smallest possible FPGA area subject to a constraint on the minimum target frame rate (fps).