Intel® FPGA AI Suite: Compiler Reference Manual

ID 768972
Date 9/06/2023
Public

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Document Table of Contents

B. Intel® FPGA AI Suite Compiler Reference Manual Document Revision History

Document Version Intel® FPGA AI SuiteVersion Changes
2023.09.06 2023.2.1
  • Maintenance release. No major changes.
2023.07.03 2023.2
  • Updated "Generating an Architecture for Highest Performance".
  • Updated "Architecture Optimization Options (dla_compiler Command Options)".
2023.04.05 2023.1
  • Updated "Reporting (dla_compiler Command Options)".
  • Renamed thedlac command. The Intel® FPGA AI Suite compiler command is now dla_compiler.
  • Updated the Intel® Agilex™ product family name to "Intel Agilex® 7."
2022.12.23 2022.2
  • Added the --bin-data option of the dlac command.
  • Removed references to the --mfamily option of the dlac command. This option is no longer supported.

    Use the family parameter in the architecture description file (.arch) instead.

2022.05.26

2022.1.1

  • Added note that the architecture optimizer supports only interleaves 1xN and Nx1.

2022.04.27

2022.1

  • Removed some command options that were not implemented.
  • Added Intel Agilex® 7 device information where appropriate.

2021.09.10

2021.2

  • Maintenance release.

2021.04.30

2021.1

  • Improved information formatting and corrected the names of some command options.

2020.12.04

2020.2

  • The following dlac command options have been renamed:
    • --plugins_file is now --plugins-file
    • --network_file is now --network-file
    • --network_weightings is now --network-weightings

2020.10.30

2020.1

  • Initial release.