F-Tile HDMI Intel® FPGA IP Design Example User Guide

ID 709314
Date 4/03/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.6.3. Initialize RX Path

Perform necessary initialization on the RX path.
  • Check if the external HDMI sink supports FRL.
  • EDID passthrough from the external HDMI sink to Intel HDMI RX or configure the EDID RAM based on the predefined EDID in the software according to different FRL rate.

    The selection between EDID passthrough (LOOPBACK_MODE=1) or predefined EDID (LOOPBACK_MODE=0) is based on the LOOPBACK_MODE definition in the global.h.

Note: You need to run with EDID passthrough (LOOPBACK_MODE=1) when running on TMDS mode.

Refer to the Initialize RX Path Flowchart figure for more details.