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Ixiasoft
Step 1: Getting Started
Step 2: Creating a Design Partition
Step 3: Allocating Placement and Routing Region for a PR Partition
Step 4: Defining Personas
Step 5: Creating Revisions
Step 6: Compiling the Base Revision
Step 7: Preparing PR Implementation Revisions
Step 8: Programming the Board
Modifying an Existing Persona
Adding a New Persona to the Design
Visible to Intel only — GUID: lni1623339820436
Ixiasoft
Reference Design Requirements
This reference design requires the following:
- Installation of the Intel® Quartus® Prime Pro Edition version 23.3, understanding of the basic FPGA design flow, and project files for the design implementation.
- Connection to the Intel Agilex® 7 F-Series or M-Series FPGA development board on the bench.