Quartus® Prime Pro Edition User Guide: Partial Reconfiguration

ID 683834
Date 10/23/2024
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2.4. Partial Reconfiguration External Configuration Controller Intel FPGA IP

The Partial Reconfiguration External Configuration Controller Intel® FPGA IP supports partial reconfiguration via an external source.

When using external configuration, you must connect all the top-level ports of the Partial Reconfiguration External Configuration Controller Intel® FPGA IP to the pr_request and status pins. These connections allow the handshaking of the host with the SDM from the Agilex® 7, Agilex™ 5, or Stratix® 10 device core. The SDM determines which types of configuration pins to use, according your MSEL setting.

Figure 65.  Partial Reconfiguration External Configuration Controller Intel® FPGA IP