Arria® 10 and Cyclone® 10 GX Avalon® Memory-Mapped (Avalon-MM) Interface for PCI Express* User Guide
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Ixiasoft
Visible to Intel only — GUID: xzu1525903625494
Ixiasoft
14.1. Overview of the Design Example
- Arria® 10 PCIe Root Port DUT
- On-chip memory for RXM_BAR0
- Avalon® -MM clock-crossing bridge
- JTAG master bridge
- Small module for convenient pin assignments for the development kit
After the design example is generated, a pcie_example_design.qpf and pcie_example_design.qsf files are generated along with a pcie_example_design.qsys file as shown in the directory structure. You can open the pcie_example_design.qpf project file in Quartus® Prime and directly run compilation.