Visible to Intel only — GUID: bhc1411109370274
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Introduction
System-Level Debugging Infrastructure
Virtual JTAG Interface Description
Run-Time Communication
Instantiating the Virtual JTAG Intel® FPGA IP Core
Simulation Support
Compiling the Design
SLD_NODE Discovery and Enumeration
Capturing the Virtual IR Instruction Register
AHDL Function Prototype
VHDL Component Declaration
VHDL LIBRARY-USE Declaration
Design Example: TAP Controller State Machine
Design Example: Modifying the DCFIFO Contents at Runtime
Design Example: Offloading Hardwired Revision Information
Document Revision History for the Virtual JTAG Intel® FPGA IP Core User Guide
Visible to Intel only — GUID: bhc1411109370274
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Run-Time Communication
The Virtual JTAG Intel® FPGA IP core Tcl API requires an Intel® programming cable. Designs that use a custom controller to drive the JTAG chain directly must issue the correct JTAG IR/DR transactions to target the Virtual JTAG Intel® FPGA IP core instances. The address values and register length information for each Virtual JTAG Intel® FPGA IP core instance are provided in the compilation reports.
Figure 10. Compilation ReportThis figure shows the compilation report for a Virtual JTAG Intel® FPGA IP core Instance.
| Setting | Description |
|---|---|
| sld_auto_instance_index | Details whether the index was auto-assigned. |
| sld_instance_index | Instance index of the Virtual JTAG Intel® FPGA IP core. Assigned at compile time. |
| sld_ir_width | Length of the Virtual IR register for this IP core instance; defined in the parameter editor. |
Note: The description of the other settings shown in the Compilation Report diagram can be obtained from the Description of Simulation Parameters table.
The Tcl API provides a way to return the JTAG IR/DR transactions by using the show_equivalent_device_ir_dr_shift argument with the device_virtual_ir_shift and device_virtual_dr_shift commands. The following examples use returned values of a virtual IR/DR shift to illustrate the format of the underlying transactions.
To use the Tcl API to query for the bit pattern in your design, use the show_equivalent_device_ir_dr_shift argument with the device_virtual_ir_shift and device_virtual_dr_shift commands.
Both examples are from the same design, with a single Virtual JTAG instance. The VIR length for the reference Virtual JTAG instance is configured to 3 bits in length.