AN 848: Implementing Intel® Cyclone® 10 GX Triple-Rate SDI II with Nextera FMC Daughter Card Reference Design

Download PDF
ID 683643
Date 7/05/2018
Public
Document Table of Contents
Document Table of Contents x
AN 848: Implementing Intel® Cyclone® 10 GX Triple-Rate SDI II with Nextera FMC Daughter Card Reference Design
AN 848: Implementing Intel® Cyclone® 10 GX Triple-Rate SDI II with Nextera FMC Daughter Card Reference Design x
Reference Design Block Diagram Key Features Design Components Requirements Reference Design Walkthrough Document Revision History for AN 848: Implementing Intel® Cyclone® 10 GX Triple-Rate SDI II with Nextera FMC Daughter Card Reference Design
Requirements x
Hardware Requirements Software Requirements
Reference Design Walkthrough x
Running the Reference Design Customizing the Intel® Quartus® Prime Pro Edition Reference Design Viewing the Results
Running the Reference Design x
Compiling the Project Setting up the Hardware Configuring the FPGA Checking the Video Formats and Jitter Reading
Customizing the Intel® Quartus® Prime Pro Edition Reference Design x
Generating the Reference Design Customizing the Reference Design
Viewing the Results x
Monitor User LEDs Verify the Video Image and Jitter Results at the Signal Analyzer
AN 848: Implementing Intel® Cyclone® 10 GX Triple-Rate SDI II with Nextera FMC Daughter Card Reference Design

Configuring the FPGA

Before configuring the FPGA, ensure the following tasks are completed:

  • The Intel® FPGA Download Cable II driver is installed on the host computer
  • The Intel® Cyclone® 10 GX FPGA Development Kit is powered on
  • No other running application is using the JTAG chain

To configure the FPGA, follow these steps:

  1. In the Intel® Quartus® Prime Programmer, select Hardware Setup>USB-Blaster II [USB-1].
  2. Click Auto Detect to display the devices in the JTAG chain. Select 10M08SA for device 1 and 10CX220Y for device 2.
  3. Right click 10CX220Y and select Change File. Choose the appropriate SRAM Object File (.sof) from the /quartus directory. Click Open.
  4. Turn on Program/Configure for the .sof file.
  5. Click Start to program the image into the FPGA.
    Figure 5.  Intel® Quartus® Prime Programmer
Level Two Title