Intel® Stratix® 10 Avalon® -MM Hard IP for PCIe* Design Example User Guide

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ID 683616
Date 11/06/2017
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Document Table of Contents
Document Table of Contents x
1. Quick Start Guide 2. Design Example Description A. Document Revision History for the Intel® Stratix® 10 Avalon® -MM Hard IP for PCIe* Design Example User Guide
1. Quick Start Guide x
1.1. Design Components 1.2. Directory Structure 1.3. Generating the Design Example 1.4. Simulating the Design Example 1.5. Compiling the Design Example and Programming the Device 1.6. Installing the Linux Kernel Driver 1.7. Running the Design Example Application
2. Design Example Description x
2.1. Functional Description for the Simple DMA Design Example
2.1. Functional Description for the Simple DMA Design Example x
2.1.1. Serial Data Signals
A. Document Revision History for the Intel® Stratix® 10 Avalon® -MM Hard IP for PCIe* Design Example User Guide x
A.1. Intel® Stratix® 10 Avalon® -MM Hard IP for PCIe* Design Example User Guide Revision History
1. Quick Start Guide
2. Design Example Description
A. Document Revision History for the Intel® Stratix® 10 Avalon® -MM Hard IP for PCIe* Design Example User Guide

1.3. Generating the Design Example

Follow these steps to generate your design:
Figure 4. Procedure
  1. In the Intel® Quartus® Prime Pro Edition software, create a new project (File > New Project Wizard).
  2. Specify the Directory, Name, and Top-Level Entity.
  3. For Project Type, accept the default value, Empty project. Click Next.
  4. For Add Files click Next.
  5. For Family, Device & Board Settings under Family, select Intel® Stratix® 10 and the Target Device for your design.
  6. Click Finish.
  7. In the IP Catalog locate and add the Intel® Stratix® 10 -MM Hard IP for PCI Express* . Click Create.
  8. In the New IP Variant dialog box, specify a name for your IP.
  9. On the IP Settings tabs, specify the parameters for your IP variation.
  10. On the Example Designs tab, make the following selections:
    1. For Available Example Designs, select Simple DMA.
      Note:

      The Simple DMA design example is only available when you enable Enable high performance bursting Avalon® -MM Slave interface (HPTXS) on the Avalon® -MM Settings tab.

      (The DMA design example is only available when you turn on Enable Avalon® -MM DMA on the Avalon® -MM Settings tab.)

    2. For Example Design Files, turn on the Simulation and Synthesis options.
    3. If you have selected a x16 configuration, for Select simulation Root Ccomplex BFM, choose the appropriate BFM:
    4. For Generated HDL Format, only Verilog is available in the current release.
    5. For Target Development Kit, select the appropriate option.
      Note: If you select None, the generated design example targets the device specified. If you intend to test the design in hardware, make the appropriate pin assignments in the .qsf file.
  11. Select Generate Example Design to create a design example that you can simulate and download to hardware. If you select one of the Intel® Stratix® 10 development boards, the device on that board overwrites the device previously selected in the Intel® Quartus® Prime project if the devices are different. When the prompt asks you to specify the directory for your example design, accept the default directory, <example_design>/pcie_s10_hip_ast_0_example_design
  12. Click Finish. Save your .ip file when prompted.
  13. The prompt, Recent changes have not been generated. Generate now?, allows you to create files for simulation and synthesis of the design example. Click No to simulate the testbench design example you have generated. The .sof file for the complete example design is what you download to a board to perform hardware verification.
  14. Close your project.
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