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2.1. Intel® Cyclone® 10 GX DisplayPort SST Parallel Loopback Design Features
2.2. Intel® Cyclone® 10 GX DisplayPort MST Parallel Loopback Design Features
2.3. Enabling Adaptive Sync Support
2.4. Design Components
2.5. Clocking Scheme
2.6. Interface Signals and Parameter
2.7. Hardware Setup
2.8. Simulation Testbench
2.9. DisplayPort Transceiver Reconfiguration Flow
2.10. Transceiver Lane Configurations
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1.2. Hardware and Software Requirements
Intel uses the following hardware and software to test the design example.
Hardware
- Intel® Cyclone® 10 GX FPGA Development Kit
- DisplayPort Source (Graphics Processing Unit (GPU))
- DisplayPort Sink (Monitor)
- Bitec DisplayPort FMC daughter card (Revisions 8.0 to 11.0)
- DisplayPort cables
Software
- Intel® Quartus® Prime Pro Edition (for hardware testing)
- ModelSim* - Intel® FPGA Edition, ModelSim* - Intel® FPGA Starter Edition, NCSim (Verilog only), Riviera-PRO* , Xcelium* or VCS* (Verilog only)/ VCS* MX simulator