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3.1. Installing PACSign
3.2. PACSign Tool
3.3. Creating Unsigned Images
3.4. Using an HSM Manager
3.5. Creating Keys
3.6. Root Entry Hash Bitstream Creation
3.7. Signing Images
3.8. Creating a CSK ID Cancellation Bitstream
3.9. PACSign PKCS11 Manager *.json Reference
3.10. Creating a Custom HSM Manager
3.11. PACSign Man Page
3.12. Accessing Intel® FPGA PAC N3000 Version and Authentication Information
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3.12.2. Reading sysfs Files for Identifying Information
The information provided by the fpgainfo security command is also available in sysfs entries. The sysfs entries are found in two locations:
- /sys/class/ifpga_sec_mgr/ifpga_sec<X>/security
- /sys/class/fpga/intel-fpga-dev.<X>/intel-fpga-fme.<X>/spi-altera.<X>.auto/spi_master/spiX/spi<X>.<X>/ifpga_sec_mgr/ifpga_sec<X>/security
Note: The <X> found in the following paths is a numeric value that is assigned by the kernel and is indeterminate.
The first pathname above uses a symlink to reference the same location as the second pathname. To correlate the two pathnames above, type:
ls -l /sys/security/ifpga_sec_mgr/ifpga_sec<X>
A listing of this directory displays the files in the table below:
Sysfs File | Output | Description | File Data Format |
---|---|---|---|
sr_root_hash | SR root entry hash | Root entry hash programmed by you. If you have not programmed the FPGA SR user image root entry hash, this output reports as “hash not programmed.” | Long hexadecimal output prefixed with “0x” or “hash not programmed” if the bitstreams is unsigned. |
bmc_root_hash | BMC root entry hash | Root entry hash programmed by Intel® . | Long hexadecimal output prefixed with “0x". |
pr_root_hash | PR root entry hash | Not applicable for Intel® FPGA PAC N3000 and reports “hash not programmed” in output. | N/A |
user_flash_update_counter | User Flash update counter |
Indicates how many times the staging area flash is updated. has been updated. This data can be useful in detecting threats.
Note: When the staging area flash counter reaches 1000, the Intel® MAX® 10 BMC does not allow writes for 30 seconds after device startup and between updates. When the BMC flash counter reaches 2000, the Intel® MAX® 10 BMC does not allow writes for 60 seconds after device startup and between updates.
|
Single, numeric value |
sr_canceled_csks | SR CSK IDs canceled | Indicates the IDs of the FIM code signing keys that are cancelled. | Comma-separated list of decimal numbers and ranges, such as: 0, 3-6, 8-10 |
bmc_canceled_csks | BMC CSK IDs canceled | Indicates the IDs of the BMC code signing keys that are cancelled. | Comma-separated list of decimal numbers and ranges, such as: 0, 3-6, 8-10 |
pr_canceled_csks | AFU CSK IDs canceled | Not applicable for Intel® FPGA PAC N3000. | Comma-separated list of decimal numbers and ranges, such as: 0, 3-6, 8-10 |