AN 869: Partially Reconfiguring a Design: on Intel® Cyclone® 10 GX FPGA Development Board

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ID 683503
Date 7/15/2019
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Document Table of Contents
Document Table of Contents x
Partially Reconfiguring a Design on Intel® Cyclone® 10 GX FPGA Development Board
Partially Reconfiguring a Design on Intel® Cyclone® 10 GX FPGA Development Board x
Reference Design Requirements Reference Design Overview Reference Design Files Reference Design Walkthrough Document Revision History for AN 869: Partially Reconfiguring a Design on Intel® Cyclone® 10 GX FPGA Development Board
Reference Design Walkthrough x
Step 1: Getting Started Step 2: Creating a Design Partition Step 3: Allocating Placement and Routing Region for a PR Partition Step 4: Adding the Partial Reconfiguration Controller IP Step 5: Defining Personas Step 6: Creating Revisions Step 7: Compiling the Base Revision Step 8: Preparing PR Implementation Revisions Step 9: Programming the Board Modifying an Existing Persona Adding a New Persona to the Design
Step 4: Adding the Partial Reconfiguration Controller IP x
Updating the Top-Level Design
Step 6: Creating Revisions x
Setting the Base Revision Type Creating Implementation Revisions
Step 9: Programming the Board x
Troubleshooting PR Programming Errors
Partially Reconfiguring a Design on Intel® Cyclone® 10 GX FPGA Development Board

Step 2: Creating a Design Partition

You must create design partitions for each PR region that you want to partially reconfigure. You can create any number of independent partitions or PR regions in your design. This tutorial creates a design partition for the u_blinking_led instance.

To create design partition for partial reconfiguration:

  1. Right-click the u_blinking_led instance in the Project Navigator, and then click Design Partition > Reconfigurable. A design partition icon appears next to each instance that is set as a partition. A design partition icon appears next to each instance that is set as a partition.
    Figure 3. Creating Design Partitions from Project Navigator
  2. To view and edit all design partitions in the project, click Assignments > Design Partitions Window. The design partition appears on the Assignments View tab of the Design Partitions Window.
    Note: When you create a partition, the Intel® Quartus® Prime software automatically generates a partition name based on the instance name and hierarchy path. This default partition name can vary with each instance.
  3. Edit the partition name in the Design Partitions Window by double-clicking the name. For this reference design, rename the partition name to pr_partition.
    Figure 4. Design Partitions Window
  4. To export the finalized static region from the base revision compile, double-click the entry for root_partition in the Post Final Export File column, and type blinking_led_static.qdb.

Verify that the blinking_led.qsf contains the following assignments, corresponding to your reconfigurable design partition: 

set_instance_assignment -name PARTITION pr_partition -to \
     u_blinking_led -entity top
set_instance_assignment -name PARTIAL_RECONFIGURATION_PARTITION ON \
        -to u_blinking_led -entity top
set_instance_assignment -name EXPORT_PARTITION_SNAPSHOT_FINAL \	
        blinking_led_static.qdb -to | -entity top
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