AN 320: Using Intel® FPGA IP Evaluation Mode

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ID 683502
Date 10/22/2018
Public
Document Table of Contents
Document Table of Contents x
1. AN 320: Using Intel® FPGA IP Evaluation Mode
1. AN 320: Using Intel® FPGA IP Evaluation Mode x
1.1. Intel® FPGA IP Evaluation Modes 1.2. Viewing IP Core License Status 1.3. Intel® FPGA IP Evaluation Mode Messages 1.4. Licensing Intel® FPGA IP Cores 1.5. Evaluation Period Timeout Indicator 1.6. Disable Intel® FPGA IP Evaluation Mode 1.7. Using Intel® FPGA IP Evaluation Mode in Teams ( Intel® Quartus® Prime Standard Edition) 1.8. Using Intel FPGA IP Evaluation Mode Document Revision History
1. AN 320: Using Intel® FPGA IP Evaluation Mode

1.6. Disable Intel® FPGA IP Evaluation Mode

The Intel® FPGA IP Evaluation Mode is enabled by default. Implementation of the Intel® FPGA IP Evaluation Mode requires the use of some FPGA device resources. This use of device resources can impact design placement, routing, and timing.
If you are not using Intel® FPGA IP Evaluation Mode, and want to avoid using device resources for this feature, disable the feature:
  1. In the Intel® Quartus® Prime software, click Assignments > Settings > Compilation Process Settings.
  2. Click the More Settings button.
  3. For Intel® FPGA IP Evaluation Mode , select Disable.
    Figure 6. Disable IP Evaluation Mode
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