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1. Overview of the Intel® FPGA Power and Thermal Calculator
2. Setting Up the Intel® FPGA Power and Thermal Calculator
3. Intel® FPGA Power and Thermal Calculator Graphical User Interface
4. Intel® FPGA Power and Thermal Calculator Pages
5. Factors Affecting the Accuracy of the Intel® FPGA Power and Thermal Calculator
6. Intel® FPGA Power and Thermal Calculator User Guide Archive
7. Document Revision History for the Intel® FPGA Power and Thermal Calculator User Guide
A. Measuring Static Power
4.1. Intel® FPGA PTC - Power Summary
4.2. Intel® FPGA PTC - Common Page Elements
4.3. Intel® FPGA PTC - Device Selection and Thermal Analysis Windows
4.4. Intel® FPGA PTC - Main Page
4.5. Intel® FPGA PTC - Logic Page
4.6. Intel® FPGA PTC - RAM Page
4.7. Intel® FPGA PTC - DSP Page
4.8. Intel® FPGA PTC - Clock Page
4.9. Intel® FPGA PTC - PLL Page
4.10. Intel® FPGA PTC - I/O Page
4.11. Intel® FPGA PTC - I/O-IP Page
4.12. Intel® FPGA PTC - Transceiver Page
4.13. Intel® FPGA PTC - HPS Page
4.14. Intel® FPGA PTC - Crypto Page ( Intel® Agilex™ Devices with Crypto Blocks Only)
4.15. Intel® FPGA PTC - HBM Page ( Intel® Stratix® 10 Devices Only)
4.16. Intel® FPGA PTC - Thermal Page
4.17. Intel® FPGA PTC - Report Page
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3.2.1. Intel® FPGA PTC Data Entry Pages
The look and feel of the Intel® FPGA Power and Thermal Calculator ( Intel® FPGA PTC) is the same whether you are using the standalone version or the version integrated within the Intel® Quartus® Prime software. There are, however, differences depending on whether you are targeting Intel® Agilex™ or Intel® Stratix® 10 devices.
The following are the pages within the Intel® FPGA PTC:
- The Main page allows you to enter device, package, and cooling information, and displays thermal analysis information pertaining to constant junction temperatures.
- The Logic page allows you to enter logic resources for all modules in your design.
- The RAM page represents design modules using RAM blocks. Among other information, enter RAM type, data width, RAM depth (if applicable), RAM mode, and port parameters.
- The DSP page represents DSP design modules. Among other information, enter DSP configuration, clock frequency, toggle percentage, and register usage.
- The Clock page represents clock networks of separate clock domains.
- The PLL page represents one or more PLLs in the device.
- The I/O page represents design modules using general-purpose I/O pins. This page does not apply to transceiver I/O pins. Among other information, enter I/O standard, input termination, current strength or output termination, data rate, clock frequency, output enable static probability, and capacitive load.
- The I/O-IP page represents design modules using complex I/O IP, such as DDR.
- The Transceiver page allows you to enter transceiver resources and their settings for all modules in your design.
- The HPS page applies to devices with HPS.
- The Crypto page allows you to enter crypto resources and their settings for all modules in your design ( Intel® Agilex™ devices with crypto blocks only).
- The HBM page ( Intel® Stratix® 10 devices only).
- The Thermal page allows you to enter temperature requirements for your design and displays thermal power and thermal analysis information.
- The Report page shows per-rail currents calculated by the Intel® FPGA Power and Thermal Calculator (PTC).