Intel® FPGA SDK for OpenCL™: Intel® Cyclone® V SoC Development Kit Reference Platform Porting Guide

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ID 683435
Date 11/06/2017
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Document Table of Contents
Document Table of Contents x
1. Intel® FPGA SDK for OpenCL™ Intel® Cyclone® V SoC Development Kit Reference Platform Porting Guide
1. Intel® FPGA SDK for OpenCL™ Intel® Cyclone® V SoC Development Kit Reference Platform Porting Guide x
1.1. Overview of the Cyclone V SoC Development Kit Reference Platform 1.2. Porting the Reference Platform to Your SoC FPGA Board 1.3. Software Support for Shared Memory 1.4. FPGA Reconfiguration 1.5. Building an SD Flash Card Image 1.6. Compiling the Linux Kernel for Cyclone V SoC FPGA 1.7. Known Issues 1.8. Document Revision History
1.1. Overview of the Cyclone V SoC Development Kit Reference Platform x
1.1.1. Cyclone V SoC Development Kit Reference Platform Board Variants 1.1.2. Content of the Cyclone V SoC Development Kit Reference Platform 1.1.3. Relevant Features of the Cyclone V SoC Development Kit
1.1.3. Relevant Features of the Cyclone V SoC Development Kit x
1.1.3.1. Cyclone V SoC Development Kit Reference Platform Design Goals and Decisions
1.2. Porting the Reference Platform to Your SoC FPGA Board x
1.2.1. Updating a Ported Reference Platform
1.4. FPGA Reconfiguration x
1.4.1. FPGA System Architecture Details
1.5. Building an SD Flash Card Image x
1.5.1. Modifying an Existing SD Flash Card Image 1.5.2. Creating an SD Flash Card Image
1.6. Compiling the Linux Kernel for Cyclone V SoC FPGA x
1.6.1. Recompiling the Linux Kernel 1.6.2. Compiling and Installing the OpenCL Linux Kernel Driver
1. Intel® FPGA SDK for OpenCL™ Intel® Cyclone® V SoC Development Kit Reference Platform Porting Guide

1.8. Document Revision History

Table 1.  Document Revision History of the Intel® FPGA SDK for OpenCL™ Cyclone V SoC Development Kit Reference Platform Porting Guide
Date Version Changes
November 2017 2017.11.03
May 2017 2017.05.08
  • Maintenance release.
Octoboer 2016 2016.10.31
  • Rebranded Altera SDK for OpenCL to Intel® FPGA SDK for OpenCL™ .
  • Rebranded Altera Offline Compiler to Intel® FPGA SDK for OpenCL™ Offline Compiler.
May 2016 2016.05.02
  • Modified instructions on building and modifying an SD flash card image.
  • Modified instructions on recompiling the Linux kernel and the OpenCL Linux kernel driver.
November 2015 2015.11.02
  • Maintenance release, and changed instances of Quartus® II to Quartus® Prime.
May 2015 15.0.0
  • In FPGA Reconfiguration, removed instruction to reprogram the FPGA core with a .rbf image by invoking the cat <image_filename>.rbf > /dev/fpga0 command because this method is not recommended.
December 2014 14.1.0
  • Renamed the document as Altera Cyclone V SoC Development Kit Reference Platform Porting Guide.
  • Updated the reprogram utility to the aocl program <device_name> <your_kernel_filename>.aocx utility command.
  • Updated the diagnostic utility to the aocl diagnose and aocl diagnose <device_name> utility command.
  • Updated the procedure in the Porting the Reference Platform to Your SoC Board section to include instructions on porting and modifying the c5soc board partition to create a timing-clean partition for the guaranteed timing closure flow.
  • Inserted the topic Updating a Ported Reference Platform to outline the procedures for the following tasks:
    1. Excluding the hard processor system (HPS) block in the board partition
    2. Updating the SD flash card image
  • Updated the Building an SD Flash Card Image section. Recommended using version 14.0 of the Golden System Reference Design (GSRD) image as the starting point instead of the image available with SoC Embedded Design Suite (EDS).
  • Updated the Recompiling the Linux Kernel and the OpenCL Linux Kernel Driver section:
    1. Added instruction to set the CROSS_COMPILE variable.
    2. Changed the command you run to verify that the CMA is enabled successfully.
July 2014 14.0.0
  • Initial Release.
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