AN 817: Static Update Partial Reconfiguration Tutorial: for Intel® Arria® 10 GX FPGA Development Board

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ID 683428
Date 7/15/2019
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Document Table of Contents
Document Table of Contents x
1. Static Update Partial Reconfiguration Tutorial for Intel® Arria® 10 GX FPGA Development Board
1. Static Update Partial Reconfiguration Tutorial for Intel® Arria® 10 GX FPGA Development Board x
1.1. Tutorial Requirements 1.2. Reference Design Overview 1.3. Static Update Region Overview 1.4. Download Reference Design Files 1.5. Reference Design Walkthrough 1.6. Static Update Partial Reconfiguration Tutorial Revision History
1.5. Reference Design Walkthrough x
1.5.1. Step 1: Getting Started 1.5.2. Step 2: Create Design Partitions 1.5.3. Step 3: Allocate Placement and Routing Regions 1.5.4. Step 4: Add the Partial Reconfiguration Controller IP 1.5.5. Step 5: Define Personas 1.5.6. Step 6: Create Revisions 1.5.7. Step 7: Compile the Base Revision 1.5.8. Step 8: Set Up PR Implementation Revisions 1.5.9. Step 9: Change the SUPR Logic 1.5.10. Step 10: Program the Board 1.5.11. Modifying the SUPR Partition
1.5.4. Step 4: Add the Partial Reconfiguration Controller IP x
1.5.4.1. Update the Top-Level Design
1.5.6. Step 6: Create Revisions x
1.5.6.1. Setting the Base Revision 1.5.6.2. Creating Implementation Revisions
1. Static Update Partial Reconfiguration Tutorial for Intel® Arria® 10 GX FPGA Development Board

1.5.7. Step 7: Compile the Base Revision

Follow these steps to compile the base revision and export the static and SUPR regions for later use in implementation revisions for new PR personae:
  1. Set blinking_led as the Current Revision if not already set.
  2. Before compiling the base revision, make sure blinking_led.qsf contains the following assignments. These assignments direct the Assembler to automatically generate the required PR bitstreams following compilation: 
    set_global_assignment -name GENERATE_PR_RBF_FILE ON
set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION OFF
  3. In the Design Partitions Window, click the (…) adjacent to the farthest right column and enable the Post Final Export File column. You can also disable or change the order of columns.
  4. To automatically export the final snapshot of PR implementation design partitions after each compilation, specify the following for the Post Final Export File options for the root and SUPR partitions. The .qdb files export to the project directory by default.
    • root_partition—blinking_led_static.qdb
    • supr_partition—blinking_led_supr_partition_final.qdb
    Figure 8. Auto Export in Design Partitions Window
    Alternatively, the following .qsf assignments export the partitions automatically after each compilation: 
    set_instance_assignment -name EXPORT_PARTITION_SNAPSHOT_FINAL \
    blinking_led_static.qdb -to | -entity top
set_instance_assignment -name EXPORT_PARTITION_SNAPSHOT_FINAL \
    blinking_led_supr_partition_final.qdb -to u_top_counter \
    -entity top
  5. To compile the blinking_led base revision, click Processing > Start Compilation. Alternatively, you can use the following command to compile this revision: 
    quartus_sh --flow compile  blinking_led -c blinking_led

    After successful compilation, the following files appear in the project directory:

    • blinking_led.sof
    • blinking_led.pr_partition.rbf
    • blinking_led_static.qdb
    • blinking_led_supr_partition_final.qdb
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